From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Subject: Re: [PATCH 2/2] xen: arm: Warn if timer interrupts are not level triggered Date: Thu, 19 Feb 2015 16:10:40 +0000 Message-ID: <1424362240.30924.110.camel@citrix.com> References: <1424359395.30924.89.camel@citrix.com> <1424359443-21584-2-git-send-email-ian.campbell@citrix.com> <54E6041C.6020300@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <54E6041C.6020300@linaro.org> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Julien Grall Cc: stefano.stabellini@eu.citrix.com, tim@xen.org, xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On Thu, 2015-02-19 at 15:41 +0000, Julien Grall wrote: > > I did consider overriding the incorrect DT on such systems but since > > so far it has only been observed on emulators and we have code in > > place to deal with edge triggering here I think warning is sufficient > > for now. [...] > > + * > > + * Check each interrupt and warn if we find ourselves in this situation. > > + */ > > Based on the comment, would it make sense to override the type of > interrupt to level in anycase? Even if the GIC allows us to write on ICFGR. See the comment in the commit message (quoted above) Ian.