From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754500AbbBTMqT (ORCPT ); Fri, 20 Feb 2015 07:46:19 -0500 Received: from mga09.intel.com ([134.134.136.24]:33807 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754442AbbBTMqP (ORCPT ); Fri, 20 Feb 2015 07:46:15 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,614,1418112000"; d="scan'208";a="688358003" From: Adrian Hunter To: Peter Zijlstra , Ingo Molnar Cc: Arnaldo Carvalho de Melo , linux-kernel@vger.kernel.org, David Ahern , Frederic Weisbecker , Jiri Olsa , Namhyung Kim , Paul Mackerras , Stephane Eranian , John Stultz , Thomas Gleixner , Pawel Moll , Steven Rostedt , Andi Kleen , Mathieu Poirier Subject: [PATCH V2 2/2] perf/x86: Provide TSC for PERF_SAMPLE_CLOCK_PT Date: Fri, 20 Feb 2015 14:44:09 +0200 Message-Id: <1424436249-3572-3-git-send-email-adrian.hunter@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1424436249-3572-1-git-send-email-adrian.hunter@intel.com> References: <1424436249-3572-1-git-send-email-adrian.hunter@intel.com> Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Provide TSC for PERF_SAMPLE_CLOCK_PT. This is needed to match perf events against hardware traces like Intel Processor Trace (Intel PT) which is the purpose for which PERF_SAMPLE_CLOCK_PT was invented. Signed-off-by: Adrian Hunter --- arch/x86/include/asm/perf_event.h | 6 ++++++ arch/x86/kernel/cpu/perf_event.c | 10 ++++++++++ 2 files changed, 16 insertions(+) diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index dc0f6ed..a022f53 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -261,6 +261,12 @@ struct perf_guest_switch_msr { extern struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr); extern void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap); extern void perf_check_microcode(void); + +#ifdef CONFIG_X86_TSC +#define HAVE_PERF_SAMPLE_CLOCK_PT 1 +u64 perf_sample_clock_pt(void); +#endif + #else static inline struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr) { diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index 8271d6b..dc10084 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c @@ -2256,3 +2256,13 @@ void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap) cap->events_mask_len = x86_pmu.events_mask_len; } EXPORT_SYMBOL_GPL(perf_get_x86_pmu_capability); + +#ifdef CONFIG_X86_TSC +u64 perf_sample_clock_pt(void) +{ + u64 tsc; + + rdtscll(tsc); + return tsc; +} +#endif -- 1.9.1