From: Vikas Shivappa <vikas.shivappa@linux.intel.com>
To: linux-kernel@vger.kernel.org
Cc: vikas.shivappa@intel.com, vikas.shivappa@linux.intel.com,
matt.fleming@intel.com, hpa@zytor.com, tglx@linutronix.de,
mingo@kernel.org, tj@kernel.org, peterz@infradead.org,
will.auld@intel.com, dave.hansen@intel.com, andi.kleen@intel.com,
tony.luck@intel.com, kanaka.d.juvva@intel.com
Subject: [PATCH 6/7] x86/intel_rdt: Intel haswell CAT enumeration
Date: Tue, 24 Feb 2015 15:16:43 -0800 [thread overview]
Message-ID: <1424819804-4082-7-git-send-email-vikas.shivappa@linux.intel.com> (raw)
In-Reply-To: <1424819804-4082-1-git-send-email-vikas.shivappa@linux.intel.com>
CAT(Cache Allocation Technology) on hsw needs to be enumerated
separately. CAT is only supported on certain HSW SKUs. This patch does
a probe test for hsw CPUs by writing a CLOSid into high 32 bits of
IA32_PQR_MSR and see if the bits stick. The probe test is only done
after confirming that the CPU is HSW.
Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com>
---
arch/x86/kernel/cpu/intel_rdt.c | 42 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/arch/x86/kernel/cpu/intel_rdt.c b/arch/x86/kernel/cpu/intel_rdt.c
index 602c580..d61be19 100644
--- a/arch/x86/kernel/cpu/intel_rdt.c
+++ b/arch/x86/kernel/cpu/intel_rdt.c
@@ -38,11 +38,53 @@ DEFINE_PER_CPU(unsigned int, x86_cpu_clos);
#define rdt_for_each_child(pos_css, parent_ir) \
css_for_each_child((pos_css), &(parent_ir)->css)
+/*
+ * hsw_probetest() - Have to do probe
+ * test for Intel haswell CPUs as it does not have
+ * CPUID enumeration support for CAT.
+ *
+ * Probes by writing to the high 32 bits(CLOSid)
+ * of the IA32_PQR_MSR and testing if the bits stick.
+ * Then hardcode the max CLOS and max bitmask length on hsw.
+ */
+
+static inline bool hsw_probetest(void)
+{
+ u32 l, h_old, h_new, h_tmp;
+
+ if (rdmsr_safe(MSR_IA32_PQR_ASSOC, &l, &h_old))
+ return false;
+
+ /*
+ * Default value is always 0 if feature is present.
+ */
+ h_tmp = h_old ^ 0x1U;
+ if (wrmsr_safe(MSR_IA32_PQR_ASSOC, l, h_tmp) ||
+ rdmsr_safe(MSR_IA32_PQR_ASSOC, &l, &h_new))
+ return false;
+
+ if (h_tmp != h_new)
+ return false;
+
+ wrmsr_safe(MSR_IA32_PQR_ASSOC, l, h_old);
+
+ boot_cpu_data.x86_cat_closs = 4;
+ boot_cpu_data.x86_cat_cbmlength = 20;
+
+ return true;
+}
+
static inline bool cat_supported(struct cpuinfo_x86 *c)
{
if (cpu_has(c, X86_FEATURE_CAT_L3))
return true;
+ /*
+ * Probe test for Haswell CPUs.
+ */
+ if (c->x86 == 6 && c->x86_model == 0x3f)
+ return hsw_probetest();
+
return false;
}
--
1.9.1
next prev parent reply other threads:[~2015-02-24 23:18 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-24 23:16 [PATCH V4 0/7] x86/intel_rdt: Intel Cache Allocation Technology Vikas Shivappa
2015-02-24 23:16 ` [PATCH 1/7] x86/intel_rdt: Intel Cache Allocation Technology detection Vikas Shivappa
2015-02-24 23:43 ` Borislav Petkov
2015-02-25 0:42 ` Vikas Shivappa
2015-02-25 11:21 ` Borislav Petkov
2015-02-26 18:19 ` Vikas Shivappa
2015-02-26 18:58 ` Borislav Petkov
2015-02-26 19:12 ` Vikas Shivappa
2015-02-26 19:22 ` Borislav Petkov
2015-03-03 23:34 ` Vikas Shivappa
2015-02-24 23:16 ` [PATCH 2/7] x86/intel_rdt: Adds support for Class of service management Vikas Shivappa
2015-02-24 23:16 ` [PATCH 3/7] x86/intel_rdt: Support cache bit mask for Intel CAT Vikas Shivappa
2015-02-27 12:12 ` Tejun Heo
2015-02-27 12:18 ` Tejun Heo
2015-02-27 19:34 ` Vikas Shivappa
2015-02-27 19:42 ` Tejun Heo
2015-02-27 21:38 ` Vikas Shivappa
2015-02-24 23:16 ` [PATCH 4/7] x86/intel_rdt: Implement scheduling support for Intel RDT Vikas Shivappa
2015-02-24 23:16 ` [PATCH 5/7] x86/intel_rdt: Software Cache for IA32_PQR_MSR Vikas Shivappa
2015-02-24 23:16 ` Vikas Shivappa [this message]
2015-02-24 23:16 ` [PATCH 7/7] x86/intel_rdt: Add CAT documentation and usage guide Vikas Shivappa
2015-02-26 19:31 ` Hagen Paul Pfeifer
2015-02-25 9:26 ` [PATCH V4 0/7] x86/intel_rdt: Intel Cache Allocation Technology Peter Zijlstra
2015-02-25 16:40 ` Luck, Tony
2015-02-26 11:37 ` Ingo Molnar
2015-02-26 17:26 ` Vikas Shivappa
2015-02-26 18:16 ` Vikas Shivappa
2015-03-19 22:18 ` Vikas Shivappa
-- strict thread matches above, loose matches on Subject: below --
2015-03-12 23:16 [PATCH V5 " Vikas Shivappa
2015-03-12 23:16 ` [PATCH 6/7] x86/intel_rdt: Intel haswell CAT enumeration Vikas Shivappa
2015-05-02 1:36 [PATCH V6 0/7] x86/intel_rdt: Intel Cache Allocation Technology Vikas Shivappa
2015-05-02 1:36 ` [PATCH 6/7] x86/intel_rdt: Intel haswell CAT enumeration Vikas Shivappa
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