diff for duplicates of <1425075293-14612-2-git-send-email-galak@codeaurora.org> diff --git a/a/1.txt b/N1/1.txt index c33c2b9..2d35c23 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -85,7 +85,7 @@ index 0000000..4d2f073 + +/ { + soc { -+ serial@78b0000 { ++ serial at 78b0000 { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp1_uart2_default>; @@ -130,25 +130,25 @@ index 0000000..72ad0f7 + #address-cells = <1>; + #size-cells = <0>; + -+ CPU0: cpu@0 { ++ CPU0: cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0>; + }; + -+ CPU1: cpu@1 { ++ CPU1: cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x1>; + }; + -+ CPU2: cpu@2 { ++ CPU2: cpu at 2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x2>; + }; + -+ CPU3: cpu@3 { ++ CPU3: cpu at 3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x3>; @@ -170,7 +170,7 @@ index 0000000..72ad0f7 + ranges = <0 0 0 0xffffffff>; + compatible = "simple-bus"; + -+ pinctrl@1000000 { ++ pinctrl at 1000000 { + compatible = "qcom,msm8916-pinctrl"; + reg = <0x1000000 0x300000>; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; @@ -204,14 +204,14 @@ index 0000000..72ad0f7 + }; + }; + -+ gcc: qcom,gcc@1800000 { ++ gcc: qcom,gcc at 1800000 { + compatible = "qcom,gcc-msm8916"; + #clock-cells = <1>; + #reset-cells = <1>; + reg = <0x1800000 0x80000>; + }; + -+ blsp1_uart2: serial@78b0000 { ++ blsp1_uart2: serial at 78b0000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x78b0000 0x200>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; @@ -220,14 +220,14 @@ index 0000000..72ad0f7 + status = "disabled"; + }; + -+ intc: interrupt-controller@b000000 { ++ intc: interrupt-controller at b000000 { + compatible = "qcom,msm-qgic2"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>; + }; + -+ timer@b020000 { ++ timer at b020000 { + #address-cells = <1>; + #size-cells = <1>; + ranges; @@ -235,7 +235,7 @@ index 0000000..72ad0f7 + reg = <0xb020000 0x1000>; + clock-frequency = <19200000>; + -+ frame@b021000 { ++ frame at b021000 { + frame-number = <0>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; @@ -243,42 +243,42 @@ index 0000000..72ad0f7 + <0xb022000 0x1000>; + }; + -+ frame@b023000 { ++ frame at b023000 { + frame-number = <1>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb023000 0x1000>; + status = "disabled"; + }; + -+ frame@b024000 { ++ frame at b024000 { + frame-number = <2>; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb024000 0x1000>; + status = "disabled"; + }; + -+ frame@b025000 { ++ frame at b025000 { + frame-number = <3>; + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb025000 0x1000>; + status = "disabled"; + }; + -+ frame@b026000 { ++ frame at b026000 { + frame-number = <4>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb026000 0x1000>; + status = "disabled"; + }; + -+ frame@b027000 { ++ frame at b027000 { + frame-number = <5>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb027000 0x1000>; + status = "disabled"; + }; + -+ frame@b028000 { ++ frame at b028000 { + frame-number = <6>; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb028000 0x1000>; diff --git a/a/content_digest b/N1/content_digest index 2c7e4a1..d0fdd94 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,13 +1,8 @@ "ref\01425075293-14612-1-git-send-email-galak@codeaurora.org\0" - "From\0Kumar Gala <galak@codeaurora.org>\0" + "From\0galak@codeaurora.org (Kumar Gala)\0" "Subject\0[PATCH 2/2] arm64: dts: Add Qualcomm MSM8916 SoC and evaluation board dts\0" "Date\0Fri, 27 Feb 2015 16:14:53 -0600\0" - "To\0linux-arm-msm@vger.kernel.org\0" - "Cc\0Kumar Gala <galak@codeaurora.org>" - linux-arm-kernel@lists.infradead.org - linux-kernel@vger.kernel.org - arm@kernel.org - " olof@lixom.net\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Add initial device tree support for Qualcomm MSM8916 SoC and MTP8916\n" @@ -97,7 +92,7 @@ "+\n" "+/ {\n" "+\tsoc {\n" - "+\t\tserial@78b0000 {\n" + "+\t\tserial at 78b0000 {\n" "+\t\t\tstatus = \"okay\";\n" "+\t\t\tpinctrl-names = \"default\", \"sleep\";\n" "+\t\t\tpinctrl-0 = <&blsp1_uart2_default>;\n" @@ -142,25 +137,25 @@ "+\t\t#address-cells = <1>;\n" "+\t\t#size-cells = <0>;\n" "+\n" - "+\t\tCPU0: cpu@0 {\n" + "+\t\tCPU0: cpu at 0 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" "+\t\t\treg = <0x0>;\n" "+\t\t};\n" "+\n" - "+\t\tCPU1: cpu@1 {\n" + "+\t\tCPU1: cpu at 1 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" "+\t\t\treg = <0x1>;\n" "+\t\t};\n" "+\n" - "+\t\tCPU2: cpu@2 {\n" + "+\t\tCPU2: cpu at 2 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" "+\t\t\treg = <0x2>;\n" "+\t\t};\n" "+\n" - "+\t\tCPU3: cpu@3 {\n" + "+\t\tCPU3: cpu at 3 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" "+\t\t\treg = <0x3>;\n" @@ -182,7 +177,7 @@ "+\t\tranges = <0 0 0 0xffffffff>;\n" "+\t\tcompatible = \"simple-bus\";\n" "+\n" - "+\t\tpinctrl@1000000 {\n" + "+\t\tpinctrl at 1000000 {\n" "+\t\t\tcompatible = \"qcom,msm8916-pinctrl\";\n" "+\t\t\treg = <0x1000000 0x300000>;\n" "+\t\t\tinterrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -216,14 +211,14 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tgcc: qcom,gcc@1800000 {\n" + "+\t\tgcc: qcom,gcc at 1800000 {\n" "+\t\t\tcompatible = \"qcom,gcc-msm8916\";\n" "+\t\t\t#clock-cells = <1>;\n" "+\t\t\t#reset-cells = <1>;\n" "+\t\t\treg = <0x1800000 0x80000>;\n" "+\t\t};\n" "+\n" - "+\t\tblsp1_uart2: serial@78b0000 {\n" + "+\t\tblsp1_uart2: serial at 78b0000 {\n" "+\t\t\tcompatible = \"qcom,msm-uartdm-v1.4\", \"qcom,msm-uartdm\";\n" "+\t\t\treg = <0x78b0000 0x200>;\n" "+\t\t\tinterrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -232,14 +227,14 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\tintc: interrupt-controller@b000000 {\n" + "+\t\tintc: interrupt-controller at b000000 {\n" "+\t\t\tcompatible = \"qcom,msm-qgic2\";\n" "+\t\t\tinterrupt-controller;\n" "+\t\t\t#interrupt-cells = <3>;\n" "+\t\t\treg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\ttimer@b020000 {\n" + "+\t\ttimer at b020000 {\n" "+\t\t\t#address-cells = <1>;\n" "+\t\t\t#size-cells = <1>;\n" "+\t\t\tranges;\n" @@ -247,7 +242,7 @@ "+\t\t\treg = <0xb020000 0x1000>;\n" "+\t\t\tclock-frequency = <19200000>;\n" "+\n" - "+\t\t\tframe@b021000 {\n" + "+\t\t\tframe at b021000 {\n" "+\t\t\t\tframe-number = <0>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,\n" "+\t\t\t\t\t <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -255,42 +250,42 @@ "+\t\t\t\t <0xb022000 0x1000>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tframe@b023000 {\n" + "+\t\t\tframe at b023000 {\n" "+\t\t\t\tframe-number = <1>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;\n" "+\t\t\t\treg = <0xb023000 0x1000>;\n" "+\t\t\t\tstatus = \"disabled\";\n" "+\t\t\t};\n" "+\n" - "+\t\t\tframe@b024000 {\n" + "+\t\t\tframe at b024000 {\n" "+\t\t\t\tframe-number = <2>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;\n" "+\t\t\t\treg = <0xb024000 0x1000>;\n" "+\t\t\t\tstatus = \"disabled\";\n" "+\t\t\t};\n" "+\n" - "+\t\t\tframe@b025000 {\n" + "+\t\t\tframe at b025000 {\n" "+\t\t\t\tframe-number = <3>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;\n" "+\t\t\t\treg = <0xb025000 0x1000>;\n" "+\t\t\t\tstatus = \"disabled\";\n" "+\t\t\t};\n" "+\n" - "+\t\t\tframe@b026000 {\n" + "+\t\t\tframe at b026000 {\n" "+\t\t\t\tframe-number = <4>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;\n" "+\t\t\t\treg = <0xb026000 0x1000>;\n" "+\t\t\t\tstatus = \"disabled\";\n" "+\t\t\t};\n" "+\n" - "+\t\t\tframe@b027000 {\n" + "+\t\t\tframe at b027000 {\n" "+\t\t\t\tframe-number = <5>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;\n" "+\t\t\t\treg = <0xb027000 0x1000>;\n" "+\t\t\t\tstatus = \"disabled\";\n" "+\t\t\t};\n" "+\n" - "+\t\t\tframe@b028000 {\n" + "+\t\t\tframe at b028000 {\n" "+\t\t\t\tframe-number = <6>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;\n" "+\t\t\t\treg = <0xb028000 0x1000>;\n" @@ -304,4 +299,4 @@ "The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\n" a Linux Foundation Collaborative Project -59b212ca29d8827ba21faaa11f1a59275931284c61c78642d4ed4a667c9d6a01 +6f9288165c5663e5098a9adc0c8252b68aa7cae0fd4cbc2ae4eda81c971e0eb1
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.