From: <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
To: <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
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Cc: <linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
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<andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>,
<jg1.han-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
<galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Subject: [RFC/PATCH 1/2] dt-binding: spi: spi-dw: Select 16b or 32b access for Designware SPI
Date: Wed, 4 Mar 2015 14:31:14 -0600 [thread overview]
Message-ID: <1425501075-17081-2-git-send-email-tthayer@opensource.altera.com> (raw)
In-Reply-To: <1425501075-17081-1-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
From: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
Altera's Arria10 architecture requires a 32bit accesses for
peripherals. The current spi-dw driver uses 16bit accesses in
some locations. This patch updated the bindings with an optional
field the devicetree can use to select 32bit accesses.
Signed-off-by: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
---
Documentation/devicetree/bindings/spi/spi-dw.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-dw.txt b/Documentation/devicetree/bindings/spi/spi-dw.txt
index 7b63ed6..034dbdd 100644
--- a/Documentation/devicetree/bindings/spi/spi-dw.txt
+++ b/Documentation/devicetree/bindings/spi/spi-dw.txt
@@ -11,6 +11,7 @@ Required properties:
Optional properties:
- cs-gpios: see spi-bus.txt
+- 32bit_access : use 32 bit register accesses
Example:
--
1.7.9.5
--
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WARNING: multiple messages have this Message-ID (diff)
From: <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
To: broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
jkosina-AlSwsSmVLrQ@public.gmane.org,
pawel.moll-5wv7dgnIgG8@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
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dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org
Cc: linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
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tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org,
tthayer.linux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
axel.lin-8E1dMatC8ynQT0dZR+AlfA@public.gmane.org,
baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org,
andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org,
jg1.han-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org,
galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
Subject: [RFC/PATCH 1/2] dt-binding: spi: spi-dw: Select 16b or 32b access for Designware SPI
Date: Wed, 4 Mar 2015 14:31:14 -0600 [thread overview]
Message-ID: <1425501075-17081-2-git-send-email-tthayer@opensource.altera.com> (raw)
In-Reply-To: <1425501075-17081-1-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
From: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
Altera's Arria10 architecture requires a 32bit accesses for
peripherals. The current spi-dw driver uses 16bit accesses in
some locations. This patch updated the bindings with an optional
field the devicetree can use to select 32bit accesses.
Signed-off-by: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
---
Documentation/devicetree/bindings/spi/spi-dw.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-dw.txt b/Documentation/devicetree/bindings/spi/spi-dw.txt
index 7b63ed6..034dbdd 100644
--- a/Documentation/devicetree/bindings/spi/spi-dw.txt
+++ b/Documentation/devicetree/bindings/spi/spi-dw.txt
@@ -11,6 +11,7 @@ Required properties:
Optional properties:
- cs-gpios: see spi-bus.txt
+- 32bit_access : use 32 bit register accesses
Example:
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-spi" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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next prev parent reply other threads:[~2015-03-04 20:31 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-04 20:31 [RFC/PATCH 0/2] spi: spi-dw: Select 16b or 32b register access tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2015-03-04 20:31 ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
[not found] ` <1425501075-17081-1-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-03-04 20:31 ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx [this message]
2015-03-04 20:31 ` [RFC/PATCH 1/2] dt-binding: spi: spi-dw: Select 16b or 32b access for Designware SPI tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2015-03-04 20:44 ` [RFC/PATCH 0/2] spi: spi-dw: Select 16b or 32b register access Andy Shevchenko
2015-03-04 22:01 ` Thor Thayer
2015-03-04 22:01 ` Thor Thayer
[not found] ` <54F7809E.2010307-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-03-05 10:43 ` Andy Shevchenko
[not found] ` <1425552233.14897.189.camel-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2015-03-05 20:41 ` Thor Thayer
2015-03-05 20:41 ` Thor Thayer
2015-03-05 21:54 ` Andy Shevchenko
2015-03-06 23:06 ` Thor Thayer
2015-03-06 23:06 ` Thor Thayer
2015-03-04 20:31 ` [RFC/PATCH 2/2] spi: dw-spi: Pointers select 16b vs. 32b DesignWare access tthayer
2015-03-04 20:31 ` tthayer
2015-03-04 20:55 ` Andy Shevchenko
[not found] ` <1425502525.14897.185.camel-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2015-03-04 22:07 ` Thor Thayer
2015-03-04 22:07 ` Thor Thayer
2015-03-04 21:02 ` [RFC/PATCH 0/2] spi: spi-dw: Select 16b or 32b register access Andy Shevchenko
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