From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Subject: Re: [PATCH V14 5/7] xen/arm: Instruction prefetch abort (X) mem_access event handling Date: Mon, 30 Mar 2015 10:41:22 +0100 Message-ID: <1427708482.13935.252.camel@citrix.com> References: <1427407531-31694-1-git-send-email-tklengyel@sec.in.tum.de> <1427407531-31694-6-git-send-email-tklengyel@sec.in.tum.de> <1427471569.13935.177.camel@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Tamas K Lengyel Cc: "wei.liu2@citrix.com" , Stefano Stabellini , Ian Jackson , Julien Grall , Tim Deegan , Xen-devel , Stefano Stabellini , Jan Beulich , Keir Fraser List-Id: xen-devel@lists.xenproject.org On Fri, 2015-03-27 at 22:18 +0000, Tamas K Lengyel wrote: > > > union hsr hsr) > > { > > - register_t addr = READ_SYSREG(FAR_EL2); > > - inject_iabt_exception(regs, addr, hsr.len); > > + struct hsr_iabt iabt = hsr.iabt; > > + int rc; > > + paddr_t gpa; > > + register_t gva = READ_SYSREG(FAR_EL2); > > + > > + if ( iabt.s1ptw ) > > + gpa = READ_SYSREG(HPFAR_EL2); > > + else > > > Can you not avoid the else case entirely by extending the if to cover > the other cases where HPFAR is explicitly valid? I can't be bothered to > go look right now but IIRC it included at least stage 2 access > permissions related failures, which would cover more xenaccess > scenarios, no? > > > Depending on the fault cause, we might. For permission faults, HPFAR > is only valid during s1ptw.. Given that the only check we do is for > permission faults and that's the only thing that cares about the API > anyway, we can put this entire block into the switch itself once the > fault check is already determined to be a permission fault. According to ARMv8 ARM HPFAR is valid for any of these: * A Translation or Access Flag fault on a stage 2 translation. * A stage 2 Address Size fault. * A fault on the stage 2 translation of an address accessed in a stage 1 translation table walk. I think what you are (correctly) saying is that it omits "a permission fault on a stage 2 translation", which is one of the cases which can occur under xenaccess. Which is shame :-( Ian.