From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Subject: Re: [PATCH 04/19] xen: arm: provide and use a handle_raz_wi helper Date: Thu, 2 Apr 2015 16:50:22 +0100 Message-ID: <1427989822.4037.105.camel@citrix.com> References: <1427796446.2115.34.camel@citrix.com> <1427796462-24376-4-git-send-email-ian.campbell@citrix.com> <551D5CC0.9030709@citrix.com> <1427988686.4037.103.camel@citrix.com> <551D6407.70203@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <551D6407.70203@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Julien Grall Cc: xen-devel@lists.xen.org, julien.grall@linaro.org, tim@xen.org, stefano.stabellini@eu.citrix.com List-Id: xen-devel@lists.xenproject.org On Thu, 2015-04-02 at 16:45 +0100, Julien Grall wrote: > > On 02/04/2015 16:31, Ian Campbell wrote: > > On Thu, 2015-04-02 at 16:14 +0100, Julien Grall wrote: > >> Hi Ian, > >> > >> On 31/03/2015 11:07, Ian Campbell wrote: > >>> Reduces the use of goto in the trap handlers to none. > >>> > >>> Some explcitily 32-bit types become register_t here, but that's OK, on > >> > >> s/explcitily/explicitly/ > >> > >>> 32-bit they are 32-bit already and on 64-bit it is fine/harmless to > >>> set the larger register, a 32-bit guest won't see the top half in any > >>> case. > >> > >> What about 32-bit userspace on 64-bit kernel? Are we sure that a guest > >> kernel won't only save the bottom half of the register? > > > > That would be fine, since the userspace couldn't see the top half anyway > > so not saving it doesn't hurt. > > > > In any case, the trap here has been talking from 32-bit mode and that is > > where we will return, so I'm not sure the guest kernel enters the > > picture, does it? > > It's possible for the kernel to access only a part of the 64 bit > registers and preserve the other part with a valid data to use later. > > AFAICT, nothing prevent a guest to use the top half of the registers for > his own purpose. It would only need to save/restore the bottom half of a > 64 bit registers. Writing to the bottom half (e.g. w0) of a register implicitly clears the top half, IIRC, so I think a kernel is unlikely to want to do this, even if it could (which I'm not quite convinced of). > > By resetting the 64-bit register, we will corrupt the top half of the > registers and potentially (if the use case is valid) crash the kernel. > > Although I didn't say that I would write a such guest ;) > > Regards, >