diff for duplicates of <1428029650867.38904@freescale.com> diff --git a/a/1.txt b/N1/1.txt index a4704dc..3ff3ca5 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -4,8 +4,7 @@ ________________________________________ From: Wood Scott-B07421 Sent: Friday, April 3, 2015 0:03 To: Zhao Chenhui-B35336 -Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; linux-kernel= -@vger.kernel.org; Jin Zhengxiong-R64188 +Cc: linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Jin Zhengxiong-R64188 Subject: Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e6500 On Thu, 2015-04-02 at 06:16 -0500, Zhao Chenhui-B35336 wrote: @@ -14,10 +13,8 @@ On Thu, 2015-04-02 at 06:16 -0500, Zhao Chenhui-B35336 wrote: > From: Wood Scott-B07421 > Sent: Tuesday, March 31, 2015 10:07 > To: Zhao Chenhui-B35336 -> Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; linux-kern= -el@vger.kernel.org; Jin Zhengxiong-R64188 -> Subject: Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e65= -00 +> Cc: linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Jin Zhengxiong-R64188 +> Subject: Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e6500 > > On Thu, Mar 26, 2015 at 06:18:14PM +0800, chenhui zhao wrote: > > @@ -189,16 +193,14 @@ _GLOBAL(fsl_secondary_thread_init) @@ -44,8 +41,7 @@ been set up, to determine whether PIR has already been adjusted, if your concern is avoiding running this twice on a thread between core resets. If that's not your concern, then please explain. -[chenhui] If no need to change PIR in CPU hotplug, I will change the code a= -s you mentioned. +[chenhui] If no need to change PIR in CPU hotplug, I will change the code as you mentioned. > > + /* > > + * If both threads are offline, reset core to start. @@ -58,25 +54,21 @@ s you mentioned. > > [chenhui] Reset occurs in the function mpic_reset_core(). > -> > + if (hw_cpu !=3D cpu_first_thread_sibling(hw_cpu)) { +> > + if (hw_cpu != cpu_first_thread_sibling(hw_cpu)) { > > + int hw_cpu1, hw_cpu2; > > + -> > + hw_cpu1 =3D get_hard_smp_processor_id(primary); -> > + hw_cpu2 =3D get_hard_smp_processor_id(primary + 1= -); +> > + hw_cpu1 = get_hard_smp_processor_id(primary); +> > + hw_cpu2 = get_hard_smp_processor_id(primary + 1); > > + set_hard_smp_processor_id(primary, hw_cpu2); > > + set_hard_smp_processor_id(primary + 1, hw_cpu1); > > + /* get new physical cpu id */ -> > + hw_cpu =3D get_hard_smp_processor_id(nr); +> > + hw_cpu = get_hard_smp_processor_id(nr); > > Why are you swapping the hard smp ids? > -> [chenhui] For example, Core1 has two threads, Thread0 and Thread1. In nor= -mal boot, Thread0 is CPU2, and Thread1 is CPU3. -> But, if CPU2 and CPU3 are all off, user wants CPU3 up first. we need to c= -all Thread0 as CPU3 and Thead1 as CPU2, considering -> the limitation, after core is reset, only Thread0 is up, then Thread0 kic= -ks up Thread1. +> [chenhui] For example, Core1 has two threads, Thread0 and Thread1. In normal boot, Thread0 is CPU2, and Thread1 is CPU3. +> But, if CPU2 and CPU3 are all off, user wants CPU3 up first. we need to call Thread0 as CPU3 and Thead1 as CPU2, considering +> the limitation, after core is reset, only Thread0 is up, then Thread0 kicks up Thread1. There's no need for this. I have booting from a thread1, and having it kick its thread0, working locally without messing with the hwid/cpu @@ -85,7 +77,7 @@ mapping. [chenhui] Great. If you have completed your patches, can we merge our code? > > @@ -252,11 +340,7 @@ static int smp_85xx_kick_cpu(int nr) -> > spin_table =3D phys_to_virt(*cpu_rel_addr); +> > spin_table = phys_to_virt(*cpu_rel_addr); > > > > local_irq_save(flags); > > -#ifdef CONFIG_PPC32 @@ -103,3 +95,9 @@ Please make it a separate patch with an explanation. -Scott [chenhui] OK. + + +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index b5513f6..2d41b43 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,14 +2,15 @@ "ref\020150331020722.GC5667@home.buserror.net\0" "ref\01427973405260.57477@freescale.com\0" "ref\01427990598.22867.271.camel@freescale.com\0" - "From\0chenhui.zhao@freescale.com <chenhui.zhao@freescale.com>\0" + "ref\01427990598.22867.271.camel-KZfg59tc24xl57MIdRCFDg@public.gmane.org\0" + "From\0chenhui.zhao-KZfg59tc24xl57MIdRCFDg@public.gmane.org <chenhui.zhao-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\0" "Subject\0Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e6500\0" "Date\0Fri, 3 Apr 2015 02:54:08 +0000\0" - "To\0Scott Wood <scottwood@freescale.com>\0" - "Cc\0devicetree@vger.kernel.org <devicetree@vger.kernel.org>" - linuxppc-dev@lists.ozlabs.org <linuxppc-dev@lists.ozlabs.org> - linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> - " Jason.Jin@freescale.com <Jason.Jin@freescale.com>\0" + "To\0Scott Wood <scottwood-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\0" + "Cc\0linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org <linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>" + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + " Jason.Jin-KZfg59tc24xl57MIdRCFDg@public.gmane.org <Jason.Jin-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\0" "\00:1\0" "b\0" "\n" @@ -18,8 +19,7 @@ "From: Wood Scott-B07421\n" "Sent: Friday, April 3, 2015 0:03\n" "To: Zhao Chenhui-B35336\n" - "Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; linux-kernel=\n" - "@vger.kernel.org; Jin Zhengxiong-R64188\n" + "Cc: linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Jin Zhengxiong-R64188\n" "Subject: Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e6500\n" "\n" "On Thu, 2015-04-02 at 06:16 -0500, Zhao Chenhui-B35336 wrote:\n" @@ -28,10 +28,8 @@ "> From: Wood Scott-B07421\n" "> Sent: Tuesday, March 31, 2015 10:07\n" "> To: Zhao Chenhui-B35336\n" - "> Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; linux-kern=\n" - "el@vger.kernel.org; Jin Zhengxiong-R64188\n" - "> Subject: Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e65=\n" - "00\n" + "> Cc: linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Jin Zhengxiong-R64188\n" + "> Subject: Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e6500\n" ">\n" "> On Thu, Mar 26, 2015 at 06:18:14PM +0800, chenhui zhao wrote:\n" "> > @@ -189,16 +193,14 @@ _GLOBAL(fsl_secondary_thread_init)\n" @@ -58,8 +56,7 @@ "concern is avoiding running this twice on a thread between core resets.\n" "If that's not your concern, then please explain.\n" "\n" - "[chenhui] If no need to change PIR in CPU hotplug, I will change the code a=\n" - "s you mentioned.\n" + "[chenhui] If no need to change PIR in CPU hotplug, I will change the code as you mentioned.\n" "\n" "> > + /*\n" "> > + * If both threads are offline, reset core to start.\n" @@ -72,25 +69,21 @@ ">\n" "> [chenhui] Reset occurs in the function mpic_reset_core().\n" ">\n" - "> > + if (hw_cpu !=3D cpu_first_thread_sibling(hw_cpu)) {\n" + "> > + if (hw_cpu != cpu_first_thread_sibling(hw_cpu)) {\n" "> > + int hw_cpu1, hw_cpu2;\n" "> > +\n" - "> > + hw_cpu1 =3D get_hard_smp_processor_id(primary);\n" - "> > + hw_cpu2 =3D get_hard_smp_processor_id(primary + 1=\n" - ");\n" + "> > + hw_cpu1 = get_hard_smp_processor_id(primary);\n" + "> > + hw_cpu2 = get_hard_smp_processor_id(primary + 1);\n" "> > + set_hard_smp_processor_id(primary, hw_cpu2);\n" "> > + set_hard_smp_processor_id(primary + 1, hw_cpu1);\n" "> > + /* get new physical cpu id */\n" - "> > + hw_cpu =3D get_hard_smp_processor_id(nr);\n" + "> > + hw_cpu = get_hard_smp_processor_id(nr);\n" ">\n" "> Why are you swapping the hard smp ids?\n" ">\n" - "> [chenhui] For example, Core1 has two threads, Thread0 and Thread1. In nor=\n" - "mal boot, Thread0 is CPU2, and Thread1 is CPU3.\n" - "> But, if CPU2 and CPU3 are all off, user wants CPU3 up first. we need to c=\n" - "all Thread0 as CPU3 and Thead1 as CPU2, considering\n" - "> the limitation, after core is reset, only Thread0 is up, then Thread0 kic=\n" - "ks up Thread1.\n" + "> [chenhui] For example, Core1 has two threads, Thread0 and Thread1. In normal boot, Thread0 is CPU2, and Thread1 is CPU3.\n" + "> But, if CPU2 and CPU3 are all off, user wants CPU3 up first. we need to call Thread0 as CPU3 and Thead1 as CPU2, considering\n" + "> the limitation, after core is reset, only Thread0 is up, then Thread0 kicks up Thread1.\n" "\n" "There's no need for this. I have booting from a thread1, and having it\n" "kick its thread0, working locally without messing with the hwid/cpu\n" @@ -99,7 +92,7 @@ "[chenhui] Great. If you have completed your patches, can we merge our code?\n" "\n" "> > @@ -252,11 +340,7 @@ static int smp_85xx_kick_cpu(int nr)\n" - "> > spin_table =3D phys_to_virt(*cpu_rel_addr);\n" + "> > spin_table = phys_to_virt(*cpu_rel_addr);\n" "> >\n" "> > local_irq_save(flags);\n" "> > -#ifdef CONFIG_PPC32\n" @@ -116,6 +109,12 @@ "\n" "-Scott\n" "\n" - [chenhui] OK. + "[chenhui] OK.\n" + "\n" + "\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -5dc5b575e46cd57b31621ab303045e9ed34bfe71f7bb9b3a37cb7175f8cd6a90 +9852df8201f5790533c1093021e8341cdea23ae9f7f0f4106c9c588e5f765164
diff --git a/a/1.txt b/N2/1.txt index a4704dc..077003b 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -4,8 +4,7 @@ ________________________________________ From: Wood Scott-B07421 Sent: Friday, April 3, 2015 0:03 To: Zhao Chenhui-B35336 -Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; linux-kernel= -@vger.kernel.org; Jin Zhengxiong-R64188 +Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Jin Zhengxiong-R64188 Subject: Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e6500 On Thu, 2015-04-02 at 06:16 -0500, Zhao Chenhui-B35336 wrote: @@ -14,10 +13,8 @@ On Thu, 2015-04-02 at 06:16 -0500, Zhao Chenhui-B35336 wrote: > From: Wood Scott-B07421 > Sent: Tuesday, March 31, 2015 10:07 > To: Zhao Chenhui-B35336 -> Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; linux-kern= -el@vger.kernel.org; Jin Zhengxiong-R64188 -> Subject: Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e65= -00 +> Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Jin Zhengxiong-R64188 +> Subject: Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e6500 > > On Thu, Mar 26, 2015 at 06:18:14PM +0800, chenhui zhao wrote: > > @@ -189,16 +193,14 @@ _GLOBAL(fsl_secondary_thread_init) @@ -44,8 +41,7 @@ been set up, to determine whether PIR has already been adjusted, if your concern is avoiding running this twice on a thread between core resets. If that's not your concern, then please explain. -[chenhui] If no need to change PIR in CPU hotplug, I will change the code a= -s you mentioned. +[chenhui] If no need to change PIR in CPU hotplug, I will change the code as you mentioned. > > + /* > > + * If both threads are offline, reset core to start. @@ -58,25 +54,21 @@ s you mentioned. > > [chenhui] Reset occurs in the function mpic_reset_core(). > -> > + if (hw_cpu !=3D cpu_first_thread_sibling(hw_cpu)) { +> > + if (hw_cpu != cpu_first_thread_sibling(hw_cpu)) { > > + int hw_cpu1, hw_cpu2; > > + -> > + hw_cpu1 =3D get_hard_smp_processor_id(primary); -> > + hw_cpu2 =3D get_hard_smp_processor_id(primary + 1= -); +> > + hw_cpu1 = get_hard_smp_processor_id(primary); +> > + hw_cpu2 = get_hard_smp_processor_id(primary + 1); > > + set_hard_smp_processor_id(primary, hw_cpu2); > > + set_hard_smp_processor_id(primary + 1, hw_cpu1); > > + /* get new physical cpu id */ -> > + hw_cpu =3D get_hard_smp_processor_id(nr); +> > + hw_cpu = get_hard_smp_processor_id(nr); > > Why are you swapping the hard smp ids? > -> [chenhui] For example, Core1 has two threads, Thread0 and Thread1. In nor= -mal boot, Thread0 is CPU2, and Thread1 is CPU3. -> But, if CPU2 and CPU3 are all off, user wants CPU3 up first. we need to c= -all Thread0 as CPU3 and Thead1 as CPU2, considering -> the limitation, after core is reset, only Thread0 is up, then Thread0 kic= -ks up Thread1. +> [chenhui] For example, Core1 has two threads, Thread0 and Thread1. In normal boot, Thread0 is CPU2, and Thread1 is CPU3. +> But, if CPU2 and CPU3 are all off, user wants CPU3 up first. we need to call Thread0 as CPU3 and Thead1 as CPU2, considering +> the limitation, after core is reset, only Thread0 is up, then Thread0 kicks up Thread1. There's no need for this. I have booting from a thread1, and having it kick its thread0, working locally without messing with the hwid/cpu @@ -85,7 +77,7 @@ mapping. [chenhui] Great. If you have completed your patches, can we merge our code? > > @@ -252,11 +340,7 @@ static int smp_85xx_kick_cpu(int nr) -> > spin_table =3D phys_to_virt(*cpu_rel_addr); +> > spin_table = phys_to_virt(*cpu_rel_addr); > > > > local_irq_save(flags); > > -#ifdef CONFIG_PPC32 diff --git a/a/content_digest b/N2/content_digest index b5513f6..d2597ce 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -6,8 +6,8 @@ "Subject\0Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e6500\0" "Date\0Fri, 3 Apr 2015 02:54:08 +0000\0" "To\0Scott Wood <scottwood@freescale.com>\0" - "Cc\0devicetree@vger.kernel.org <devicetree@vger.kernel.org>" - linuxppc-dev@lists.ozlabs.org <linuxppc-dev@lists.ozlabs.org> + "Cc\0linuxppc-dev@lists.ozlabs.org <linuxppc-dev@lists.ozlabs.org>" + devicetree@vger.kernel.org <devicetree@vger.kernel.org> linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> " Jason.Jin@freescale.com <Jason.Jin@freescale.com>\0" "\00:1\0" @@ -18,8 +18,7 @@ "From: Wood Scott-B07421\n" "Sent: Friday, April 3, 2015 0:03\n" "To: Zhao Chenhui-B35336\n" - "Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; linux-kernel=\n" - "@vger.kernel.org; Jin Zhengxiong-R64188\n" + "Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Jin Zhengxiong-R64188\n" "Subject: Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e6500\n" "\n" "On Thu, 2015-04-02 at 06:16 -0500, Zhao Chenhui-B35336 wrote:\n" @@ -28,10 +27,8 @@ "> From: Wood Scott-B07421\n" "> Sent: Tuesday, March 31, 2015 10:07\n" "> To: Zhao Chenhui-B35336\n" - "> Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; linux-kern=\n" - "el@vger.kernel.org; Jin Zhengxiong-R64188\n" - "> Subject: Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e65=\n" - "00\n" + "> Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Jin Zhengxiong-R64188\n" + "> Subject: Re: [3/4] powerpc: support CPU hotplug for e500mc, e5500 and e6500\n" ">\n" "> On Thu, Mar 26, 2015 at 06:18:14PM +0800, chenhui zhao wrote:\n" "> > @@ -189,16 +193,14 @@ _GLOBAL(fsl_secondary_thread_init)\n" @@ -58,8 +55,7 @@ "concern is avoiding running this twice on a thread between core resets.\n" "If that's not your concern, then please explain.\n" "\n" - "[chenhui] If no need to change PIR in CPU hotplug, I will change the code a=\n" - "s you mentioned.\n" + "[chenhui] If no need to change PIR in CPU hotplug, I will change the code as you mentioned.\n" "\n" "> > + /*\n" "> > + * If both threads are offline, reset core to start.\n" @@ -72,25 +68,21 @@ ">\n" "> [chenhui] Reset occurs in the function mpic_reset_core().\n" ">\n" - "> > + if (hw_cpu !=3D cpu_first_thread_sibling(hw_cpu)) {\n" + "> > + if (hw_cpu != cpu_first_thread_sibling(hw_cpu)) {\n" "> > + int hw_cpu1, hw_cpu2;\n" "> > +\n" - "> > + hw_cpu1 =3D get_hard_smp_processor_id(primary);\n" - "> > + hw_cpu2 =3D get_hard_smp_processor_id(primary + 1=\n" - ");\n" + "> > + hw_cpu1 = get_hard_smp_processor_id(primary);\n" + "> > + hw_cpu2 = get_hard_smp_processor_id(primary + 1);\n" "> > + set_hard_smp_processor_id(primary, hw_cpu2);\n" "> > + set_hard_smp_processor_id(primary + 1, hw_cpu1);\n" "> > + /* get new physical cpu id */\n" - "> > + hw_cpu =3D get_hard_smp_processor_id(nr);\n" + "> > + hw_cpu = get_hard_smp_processor_id(nr);\n" ">\n" "> Why are you swapping the hard smp ids?\n" ">\n" - "> [chenhui] For example, Core1 has two threads, Thread0 and Thread1. In nor=\n" - "mal boot, Thread0 is CPU2, and Thread1 is CPU3.\n" - "> But, if CPU2 and CPU3 are all off, user wants CPU3 up first. we need to c=\n" - "all Thread0 as CPU3 and Thead1 as CPU2, considering\n" - "> the limitation, after core is reset, only Thread0 is up, then Thread0 kic=\n" - "ks up Thread1.\n" + "> [chenhui] For example, Core1 has two threads, Thread0 and Thread1. In normal boot, Thread0 is CPU2, and Thread1 is CPU3.\n" + "> But, if CPU2 and CPU3 are all off, user wants CPU3 up first. we need to call Thread0 as CPU3 and Thead1 as CPU2, considering\n" + "> the limitation, after core is reset, only Thread0 is up, then Thread0 kicks up Thread1.\n" "\n" "There's no need for this. I have booting from a thread1, and having it\n" "kick its thread0, working locally without messing with the hwid/cpu\n" @@ -99,7 +91,7 @@ "[chenhui] Great. If you have completed your patches, can we merge our code?\n" "\n" "> > @@ -252,11 +340,7 @@ static int smp_85xx_kick_cpu(int nr)\n" - "> > spin_table =3D phys_to_virt(*cpu_rel_addr);\n" + "> > spin_table = phys_to_virt(*cpu_rel_addr);\n" "> >\n" "> > local_irq_save(flags);\n" "> > -#ifdef CONFIG_PPC32\n" @@ -118,4 +110,4 @@ "\n" [chenhui] OK. -5dc5b575e46cd57b31621ab303045e9ed34bfe71f7bb9b3a37cb7175f8cd6a90 +7c3cd3195a5b18461d2d7c3d41fcc82dedc37b65d1c5dd68ca5ff6188f0314e4
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