From: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] arc: add support for SLC (System Level Cache, AKA L2-cache)
Date: Fri, 3 Apr 2015 16:27:36 +0000 [thread overview]
Message-ID: <1428078455.2836.21.camel@synopsys.com> (raw)
In-Reply-To: <1427797512-32080-1-git-send-email-abrodkin@synopsys.com>
On Tue, 2015-03-31 at 13:25 +0300, Alexey Brodkin wrote:
> ARCv2 cores may have built-in SLC (System Level Cache, AKA L2-cache).
> This change adds functions required for controlling SLC:
> * slc_enable/disable
> * slc_flush/invalidate
>
> For now we just disable SLC to escape DMA coherency issues until either:
> * SLC flush/invalidate is supported in DMA APIin U-Boot
> * hardware DMA coherency is implemented (that might be board specific
> so probably we'll need to have a separate Kconfig option for
> controlling SLC explicitly)
>
> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Applied, thanks.
-Alexey
prev parent reply other threads:[~2015-04-03 16:27 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-31 10:25 [U-Boot] [PATCH] arc: add support for SLC (System Level Cache, AKA L2-cache) Alexey Brodkin
2015-04-03 16:27 ` Alexey Brodkin [this message]
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