From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tiejun Chen Subject: [PATCH 1/3] xen/vt-d: need barriers to workaround CLFLUSH Date: Mon, 4 May 2015 10:16:09 +0800 Message-ID: <1430705771-6744-1-git-send-email-tiejun.chen@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: yang.z.zhang@intel.com, kevin.tian@intel.com, jbeulich@suse.com, jinsong.liu@alibaba-inc.com, keir@xen.org, andrew.cooper3@citrix.com Cc: xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org clflush is a light weight but not serializing instruction, so hence memory fence is necessary to make sure all load/store visible before flush cache line. Signed-off-by: Tiejun Chen --- xen/drivers/passthrough/vtd/x86/vtd.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/drivers/passthrough/vtd/x86/vtd.c b/xen/drivers/passthrough/vtd/x86/vtd.c index 109234e..fd2ff04 100644 --- a/xen/drivers/passthrough/vtd/x86/vtd.c +++ b/xen/drivers/passthrough/vtd/x86/vtd.c @@ -56,7 +56,9 @@ unsigned int get_cache_line_size(void) void cacheline_flush(char * addr) { + mb(); clflush(addr); + mb(); } void flush_all_cache() -- 1.9.1