Re: [PATCH v3 2/3] clk: fractional-divider: keep mwidth and nwidth internally

[Andy Shevchenko <andriy.shevchenko@linux.intel.com>]

On Thu, 2015-04-09 at 16:22 +0800, Ming Lei wrote:
> On Wed, Apr 1, 2015 at 6:09 PM, Andy Shevchenko
> <andriy.shevchenko@linux.intel.com> wrote:
> > The patch adds mwidth and nwidth fields to the struct clk_fractional_divider
> > for further usage. While here, use clk_div_mask() instead of open coding this
> > functionality.
> >
> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> > ---
> >  drivers/clk/clk-fractional-divider.c | 8 +++++---
> >  include/linux/clk-provider.h         | 3 ++-
> >  2 files changed, 7 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c
> > index 786aa482..23a56a0 100644
> > --- a/drivers/clk/clk-fractional-divider.c
> > +++ b/drivers/clk/clk-fractional-divider.c
> > @@ -50,7 +50,7 @@ static long clk_fd_round_rate(struct clk_hw *hw, unsigned long rate,
> >                               unsigned long *prate)
> >  {
> >         struct clk_fractional_divider *fd = to_clk_fd(hw);
> > -       unsigned maxn = (fd->nmask >> fd->nshift) + 1;
> > +       unsigned maxn = clk_div_mask(fd->nwidth) + 1;
> 
> Looks clk_div_mask() can't be found when I build the latest
> next with these 3 patches:

And you have read cover letter carefully, right?
It mentions that you have to apply at least one patch from the other
series: http://www.spinics.net/lists/kernel/msg1958958.html

> 
>   CC      drivers/clk/clk-fractional-divider.o
> drivers/clk/clk-fractional-divider.c: In function ‘clk_fd_round_rate’:
> drivers/clk/clk-fractional-divider.c:67:4: error: implicit declaration
> of function ‘clk_div_mask’ [-Werror=implicit-function-declaration]
>     clk_div_mask(fd->mwidth), clk_div_mask(fd->nwidth),
>     ^
> cc1: some warnings being treated as errors
> make[2]: *** [drivers/clk/clk-fractional-divider.o] Error 1
> 
> Thanks,
> 
> >         unsigned div;
> >
> >         if (!rate || rate >= *prate)
> > @@ -130,9 +130,11 @@ struct clk *clk_register_fractional_divider(struct device *dev,
> >
> >         fd->reg = reg;
> >         fd->mshift = mshift;
> > -       fd->mmask = (BIT(mwidth) - 1) << mshift;
> > +       fd->mwidth = mwidth;
> > +       fd->mmask = clk_div_mask(mwidth) << mshift;
> >         fd->nshift = nshift;
> > -       fd->nmask = (BIT(nwidth) - 1) << nshift;
> > +       fd->nwidth = nwidth;
> > +       fd->nmask = clk_div_mask(nwidth) << nshift;
> >         fd->flags = clk_divider_flags;
> >         fd->lock = lock;
> >         fd->hw.init = &init;
> > diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
> > index 20b0b67..eb3c96f 100644
> > --- a/include/linux/clk-provider.h
> > +++ b/include/linux/clk-provider.h
> > @@ -480,13 +480,14 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
> >   *
> >   * Clock with adjustable fractional divider affecting its output frequency.
> >   */
> > -
> >  struct clk_fractional_divider {
> >         struct clk_hw   hw;
> >         void __iomem    *reg;
> >         u8              mshift;
> > +       u8              mwidth;
> >         u32             mmask;
> >         u8              nshift;
> > +       u8              nwidth;
> >         u32             nmask;
> >         u8              flags;
> >         spinlock_t      *lock;
> > --
> > 2.1.4
> >
> > --
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> 
> 
> 


-- 
Andy Shevchenko <andriy.shevchenko@intel.com>
Intel Finland Oy