From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ian Campbell <ian.campbell@citrix.com>
Subject: Re: [PATCH] xen/arm: gic-v3: Implement correctly the
 callback send_SGI
Date: Fri, 8 May 2015 15:02:22 +0100
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To: Julien Grall <julien.grall@citrix.com>
Cc: xen-devel@lists.xenproject.org, Chen Baozi <baozich@gmail.com>, tim@xen.org, stefano.stabellini@citrix.com, Stefano Stabellini <stefano.stabellini@eu.citrix.com>
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On Tue, 2015-04-28 at 11:31 +0100, Julien Grall wrote:
> Hi Stefano,
> 
> On 28/04/15 11:00, Stefano Stabellini wrote:
> > On Mon, 27 Apr 2015, Julien Grall wrote:
> >> diff --git a/xen/include/asm-arm/gic_v3_defs.h b/xen/include/asm-arm/gic_v3_defs.h
> >> index b8a1c2e..556f114 100644
> >> --- a/xen/include/asm-arm/gic_v3_defs.h
> >> +++ b/xen/include/asm-arm/gic_v3_defs.h
> >> @@ -147,7 +147,7 @@
> >>  
> >>  #define ICH_SGI_IRQMODE_SHIFT        40
> >>  #define ICH_SGI_IRQMODE_MASK         0x1
> >> -#define ICH_SGI_TARGET_OTHERS        1
> >> +#define ICH_SGI_TARGET_OTHERS        1UL
> > 
> > Spurious change?
> 
> No, this was a mistake when the GICv3 driver has been imported. The
> IRQMODE bit is 40 and 1 << 40 would throw the error:
> 
> gic-v3.c:847:9: error: left shift count >= width of type [-Werror]
>          WRITE_SYSREG(ICH_SGI_TARGET_OTHERS << ICH_SGI_IRQMODE_SHIFT |
>          ^

I think you want 1ULL then so it is definitely always 64-bit.