From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linuxfoundation.org ([140.211.169.12]:42978 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1946187AbbEOXJX (ORCPT ); Fri, 15 May 2015 19:09:23 -0400 Subject: Patch "arm64: kvm: use inner-shareable barriers for inner-shareable maintenance" has been added to the 3.14-stable tree To: will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, marc.zyngier@arm.com, shannon.zhao@linaro.org Cc: , From: Date: Fri, 15 May 2015 16:09:23 -0700 Message-ID: <14317313638242@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: This is a note to let you know that I've just added the patch titled arm64: kvm: use inner-shareable barriers for inner-shareable maintenance to the 3.14-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: arm64-kvm-use-inner-shareable-barriers-for-inner-shareable-maintenance.patch and it can be found in the queue-3.14 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >>From ee9e101c11478680d579bd20bb38a4d3e2514fe3 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Fri, 2 May 2014 16:24:14 +0100 Subject: arm64: kvm: use inner-shareable barriers for inner-shareable maintenance From: Will Deacon commit ee9e101c11478680d579bd20bb38a4d3e2514fe3 upstream. In order to ensure completion of inner-shareable maintenance instructions (cache and TLB) on AArch64, we can use the -ish suffix to the dsb instruction. This patch relaxes our dsb sy instructions to dsb ish where possible. Acked-by: Catalin Marinas Acked-by: Marc Zyngier Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas Cc: Shannon Zhao Signed-off-by: Greg Kroah-Hartman --- arch/arm64/kvm/hyp.S | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) --- a/arch/arm64/kvm/hyp.S +++ b/arch/arm64/kvm/hyp.S @@ -630,9 +630,15 @@ ENTRY(__kvm_tlb_flush_vmid_ipa) * whole of Stage-1. Weep... */ tlbi ipas2e1is, x1 - dsb sy + /* + * We have to ensure completion of the invalidation at Stage-2, + * since a table walk on another CPU could refill a TLB with a + * complete (S1 + S2) walk based on the old Stage-2 mapping if + * the Stage-1 invalidation happened first. + */ + dsb ish tlbi vmalle1is - dsb sy + dsb ish isb msr vttbr_el2, xzr @@ -643,7 +649,7 @@ ENTRY(__kvm_flush_vm_context) dsb ishst tlbi alle1is ic ialluis - dsb sy + dsb ish ret ENDPROC(__kvm_flush_vm_context) Patches currently in stable-queue which might be from will.deacon@arm.com are queue-3.14/kvm-arm64-vgic-fix-hyp-panic-with-64k-pages-on-juno-platform.patch queue-3.14/arm64-kvm-use-inner-shareable-barriers-for-inner-shareable-maintenance.patch