Re: [PATCH] xen: arm: Do not expose PMU to domain 0

[Ian Campbell <ian.campbell@citrix.com>]

On Fri, 2015-06-05 at 12:20 +0100, Julien Grall wrote:
> On 05/06/15 11:25, Ian Campbell wrote:
> > On Fri, 2015-06-05 at 11:17 +0100, Julien Grall wrote:
> >> Hi Ian,
> >>
> >> On 04/06/2015 17:49, Ian Campbell wrote:
> >>> It uses a PPI which we cannot route to a guest, and will surely need
> >>> more support than just that anyway.
> >>>
> >>> I noticed this on Mustang with UEFI where the built in DTB contains a
> >>> node of this type.
> >>>
> >>> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> >>> ---
> >>>   xen/arch/arm/domain_build.c |    1 +
> >>>   1 file changed, 1 insertion(+)
> >>>
> >>> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
> >>> index 1e545fe..8e87315 100644
> >>> --- a/xen/arch/arm/domain_build.c
> >>> +++ b/xen/arch/arm/domain_build.c
> >>> @@ -1105,6 +1105,7 @@ static int handle_node(struct domain *d, struct kernel_info *kinfo,
> >>>           DT_MATCH_COMPATIBLE("multiboot,module"),
> >>>           DT_MATCH_COMPATIBLE("arm,psci"),
> >>>           DT_MATCH_COMPATIBLE("arm,psci-0.2"),
> >>> +        DT_MATCH_COMPATIBLE("arm,armv8-pmuv3"),
> >>
> >> Will you are here, can you blacklist at list "arm,cortex-a15-pmu" and 
> >> "arm,cortex-a7-pmu"?
> >>
> >> I suspect we would have the same problem with them.
> > 
> > Suspect, or know?
> 
> It's based on the documentation
> (Documentation/devicetree/bindings/arm/pmu.txt):
> 
> "- interrupts : 1 combined interrupt or 1 per core. If the interrupt is
> a per-cpu
>                interrupt (PPI) then 1 interrupt should be specified.
> "

Thanks, I'll include that reference.

Ian.