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From: Ian Campbell <ian.campbell@citrix.com>
To: Chen Baozi <cbz@baozis.org>
Cc: Julien Grall <julien.grall@citrix.com>,
	xen-devel@lists.xenproject.org, Chen Baozi <baozich@gmail.com>
Subject: Re: [PATCH V6 05/10] xen/arm64: gicv3: Use AFF1 when translating ICC_SGI1R_EL1 to cpumask
Date: Fri, 5 Jun 2015 17:09:33 +0100	[thread overview]
Message-ID: <1433520573.7108.337.camel@citrix.com> (raw)
In-Reply-To: <1433163388-16970-6-git-send-email-cbz@baozis.org>

On Mon, 2015-06-01 at 20:56 +0800, Chen Baozi wrote:
> From: Chen Baozi <baozich@gmail.com>
> 
> To support more than 16 vCPUs, we have to calculate cpumask with AFF1
> field value in ICC_SGI1R_EL1.
> 
> Signed-off-by: Chen Baozi <baozich@gmail.com>
> ---
>  xen/arch/arm/vgic-v3.c            | 30 ++++++++++++++++++++++++++----
>  xen/include/asm-arm/gic_v3_defs.h |  2 ++
>  2 files changed, 28 insertions(+), 4 deletions(-)
> 
> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> index 2bf5294..f2b78a4 100644
> --- a/xen/arch/arm/vgic-v3.c
> +++ b/xen/arch/arm/vgic-v3.c
> @@ -972,13 +972,28 @@ write_ignore:
>      return 1;
>  }
>  
> -static inline void gicv3_sgir_to_cpumask(cpumask_t *cpumask,
> +static inline int gicv3_sgir_to_cpumask(cpumask_t *cpumask,
>                                           const register_t sgir)
>  {
>      unsigned long target_list;
> +    uint16_t *target_bitmap;
> +    unsigned int aff1;
>  
>      target_list = sgir & ICH_SGI_TARGETLIST_MASK;
> -    bitmap_copy(cpumask_bits(cpumask), &target_list, ICH_SGI_TARGET_BITS);
> +    /* We assume that only AFF1 is used in ICC_SGI1R_EL1. */
> +    aff1 = (sgir >> ICH_SGI_AFFINITY_LEVEL(1)) & ICH_SGI_AFFx_MASK;
> +
> +    /* There might be up to 4096 vCPUs with all bits in affinity 1
> +     * are used, so we have to check whether it will overflow the
> +     * bitmap array of cpumask_t.
> +     */
> +    if ( ((aff1 + 1) * ICH_SGI_TARGET_BITS) > NR_CPUS )
> +        return 1;
> +
> +    target_bitmap = (uint16_t *)cpumask_bits(cpumask);
> +    target_bitmap[aff1] = target_list;

I think this is another argument for passing the cluster and target list
separately at the affinity level.

> +
> +    return 0;
>  }
>  
>  static int vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
> @@ -996,8 +1011,15 @@ static int vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
>      switch ( irqmode )
>      {
>      case ICH_SGI_TARGET_LIST:
> -        /* SGI's are injected at Rdist level 0. ignoring affinity 1, 2, 3 */
> -        gicv3_sgir_to_cpumask(&vcpu_mask, sgir);
> +        /*
> +         * Currenty we assume only affinity level-1 is used in SGI's

"Currently"

> +         * injection, ignoring level 2 & 3.
> +         */
> +        if ( gicv3_sgir_to_cpumask(&vcpu_mask, sgir) )
> +        {
> +            gprintk(XENLOG_WARNING, "Wrong affinity in SGI1R_EL register\n");

I don't think we need to log this. The guest has asked to send an SGI to
a VCPU which we know can't possibly exist. I'm not sure what real h/w
would do, but if it is e.g. UNPREDICTABLE then we should consider
killing the guest here. I suspect it's actually just ignored, in which
case we can silently do the same.

Ian.

  reply	other threads:[~2015-06-05 16:09 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-01 12:56 [PATCH V6 00/10] Support more than 8 vcpus on arm64 with GICv3 Chen Baozi
2015-06-01 12:56 ` [PATCH V6 01/10] xen/arm: gic-v3: Increase the size of GICR in address space for guest Chen Baozi
2015-06-05 15:49   ` Ian Campbell
2015-06-05 16:04     ` Julien Grall
2015-06-05 16:31       ` Ian Campbell
2015-06-05 18:07         ` Julien Grall
2015-06-01 12:56 ` [PATCH V6 02/10] xen/arm: Add functions of mapping between vCPUID and virtual affinity Chen Baozi
2015-06-05 15:54   ` Ian Campbell
2015-06-01 12:56 ` [PATCH V6 03/10] xen/arm: Use the new functions for vCPUID/vaffinity transformation Chen Baozi
2015-06-05 15:56   ` Ian Campbell
2015-06-05 18:18     ` Julien Grall
2015-06-08 10:05       ` Ian Campbell
2015-06-08 13:00         ` Julien Grall
2015-06-01 12:56 ` [PATCH V6 04/10] xen/arm: Use cpumask_t type for vcpu_mask in vgic_to_sgi Chen Baozi
2015-06-05 16:05   ` Ian Campbell
2015-06-10 10:21     ` Chen Baozi
2015-06-10 10:27       ` Ian Campbell
2015-06-01 12:56 ` [PATCH V6 05/10] xen/arm64: gicv3: Use AFF1 when translating ICC_SGI1R_EL1 to cpumask Chen Baozi
2015-06-05 16:09   ` Ian Campbell [this message]
2015-06-05 18:25     ` Julien Grall
2015-06-08 10:06       ` Ian Campbell
2015-06-01 12:56 ` [PATCH V6 06/10] tools/libxl: Set 'reg' of cpu node equal to MPIDR affinity for domU Chen Baozi
2015-06-05 16:11   ` Ian Campbell
2015-06-05 16:12   ` Ian Campbell
2015-06-01 12:56 ` [PATCH V6 07/10] xen/arm: Set 'reg' of cpu node for dom0 to match MPIDR's affinity Chen Baozi
2015-06-05 16:13   ` Ian Campbell
2015-06-01 12:56 ` [PATCH V6 08/10] xen: Add arch_domain_preinit to initialise vGIC before evtchn_init Chen Baozi
2015-06-05 16:22   ` Ian Campbell
2015-06-11  9:20     ` Chen Baozi
2015-06-11  9:37       ` Ian Campbell
2015-06-11 11:16         ` Chen Baozi
2015-06-11 11:47           ` Julien Grall
2015-06-11 12:45             ` Chen Baozi
2015-06-01 12:56 ` [PATCH V6 09/10] xen/arm: make domain_max_vcpus return value from vgic_ops Chen Baozi
2015-06-05 16:26   ` Ian Campbell
2015-06-05 16:39     ` Julien Grall
2015-06-01 12:56 ` [PATCH V6 10/10] xen/arm64: increase MAX_VIRT_CPUS to 128 on arm64 Chen Baozi
2015-06-05 16:27   ` Ian Campbell
2015-06-05 14:08 ` [PATCH V6 00/10] Support more than 8 vcpus on arm64 with GICv3 Ian Campbell
2015-06-05 14:37   ` Julien Grall
2015-06-05 15:15     ` Ian Campbell
2015-06-05 14:23 ` Ian Campbell

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