From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Subject: Re: [PATCH V6 03/10] xen/arm: Use the new functions for vCPUID/vaffinity transformation Date: Mon, 8 Jun 2015 11:05:34 +0100 Message-ID: <1433757934.7108.421.camel@citrix.com> References: <1433163388-16970-1-git-send-email-cbz@baozis.org> <1433163388-16970-4-git-send-email-cbz@baozis.org> <1433519767.7108.327.camel@citrix.com> <5571E7FD.7090109@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Z1twO-00018l-EG for xen-devel@lists.xenproject.org; Mon, 08 Jun 2015 10:06:00 +0000 In-Reply-To: <5571E7FD.7090109@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Julien Grall Cc: xen-devel@lists.xenproject.org, Chen Baozi , Chen Baozi List-Id: xen-devel@lists.xenproject.org On Fri, 2015-06-05 at 19:18 +0100, Julien Grall wrote: > On 05/06/2015 16:56, Ian Campbell wrote: > > On Mon, 2015-06-01 at 20:56 +0800, Chen Baozi wrote: > >> From: Chen Baozi > >> > >> There are 3 places to change: > >> > >> * Initialise vMPIDR value in vcpu_initialise() > >> * Find the vCPU from vMPIDR affinity information when accessing GICD > >> registers in vGIC > >> * Find the vCPU from vMPIDR affinity information when booting with vPSCI > >> in vGIC > >> - Also make the code for PSCI 0.1 use MPIDR-like value as the cpuid. > > > > Does this "- Also ..." not need to be done at the same time as the > > change to how we describe things in the FDT? Since that is where the > > guest gets the parameter from, isn't it? > > Well, we only support 8 CPUs. I was assuming this would change later in the patch. I don't think PSCI 0.1 is limited to gic v2, is it? (If it is then this is worth mentioning in the commit message too) > So this changes will return the same value > as before. It may be worth to mention it. > > In another side, both PSCI 0.1 and PSCI 0.2 are modified to respect the > MPIDR like within this patch. The working in the commit message may be > misleading. Yes, possibly. > Somehow the code path slightly differ when the PSCI 0.2 for guest has > been added. The spec says (PSCI 0.1 Section 6.3 (ARM DEN 0022A)): > > "Ideally platform discovery mechanism such as firmware tables would be > used by secure firmware to describe the set of valid CPUIDs to the > hypervisor or Rich OS, if the former is not present. The hypervisor in > turn can create and supply virtual discovery mechanisms to its guests."" > > I interpreted this as CPUID is equal to the "reg" register in DT (which > is an MPIDR-like value). > > FWIW, this is the interpretation made by Linux too. Documentation/devicetree/bindings/arm/cpus.txt requires it to be the MPIDR value on armv7 and v8. Ian.