From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH] drm/i915: enable BIOS hang workaround for Lenovo T60 too Date: Tue, 23 Jun 2015 15:23:15 +0300 Message-ID: <1435062195.30781.38.camel@intel.com> References: <1434694676-2039-1-git-send-email-mikko.rapeli@iki.fi> <20150619154431.GD25769@phenom.ffwll.local> <1434731815.2385.157.camel@x220> <1434980630.31905.88.camel@intel.com> <20150623104214.GG9187@lakka.kapsi.fi> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20150623104214.GG9187@lakka.kapsi.fi> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Mikko Rapeli Cc: Paul Bolle , DirkGriesbach , intel-gfx@lists.freedesktop.org, "Rafael J. Wysocki" , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Ilya Tumaykin List-Id: dri-devel@lists.freedesktop.org T24gdGksIDIwMTUtMDYtMjMgYXQgMTM6NDIgKzAzMDAsIE1pa2tvIFJhcGVsaSB3cm90ZToKPiBI aSBJbXJlLAo+IAo+IE9uIE1vbiwgSnVuIDIyLCAyMDE1IGF0IDA0OjQzOjUwUE0gKzAzMDAsIElt cmUgRGVhayB3cm90ZToKPiA+Cj4gPiBUbyBzdW1tYXJpemUsIHNpbmNlIHdlIGV4dGVuZGVkIHRo ZSByYW5nZSBvZiBwbGF0Zm9ybXMgdG8gYXBwbHkgdGhlCj4gPiB3b3JrYXJvdW5kIGluCj4gPiBj b21taXQgYWIzYmU3M2ZhN2I0M2Y0YzM2NDhjZTI5YjVmZDY0OWVhNTRkM2FkYgo+ID4gQXV0aG9y OiBJbXJlIERlYWsgPGltcmUuZGVha0BpbnRlbC5jb20+Cj4gPiBEYXRlOiAgIE1vbiBNYXIgMiAx MzowNDo0MSAyMDE1ICswMjAwCj4gPiAKPiA+ICAgICBkcm0vaTkxNTogZ2VuNDogd29yayBhcm91 bmQgaGFuZyBkdXJpbmcgaGliZXJuYXRpb24KPiA+IAo+ID4gd2UgaGFkIHRoZSBmb2xsb3dpbmcg cmVwb3J0cyBJIGtub3cgb2Ygd2l0aCB0aGUgc2FtZSBpc3N1ZToKPiA+IC0gQWNlciBBc3BpcmUg MTgzMFQgYnkgSWx5YSAoR2VuNSkgWzFdCj4gPiAtIEZ1aml0c3UgRlNDIFM3MTEwIGJ5IERpcmsg KEdlbjQuNSkgWzJdCj4gPiAtIFRoaW5rUGFkIFg2MCBieSBQYXZlbCAoR2VuNC41KSBbM10KPiA+ IC0gVGhpbmtQYWQgVDYwIGJ5IE1pa2tvIChHZW40LjUpIFs0XQo+ID4gLSBUaGlua1BhZCBYNDEg YnkgUGF1bCAoR2VuMykgWzVdCj4gPiAKPiA+IEJhc2VkIG9uIHRoaXMgSSB3b3VsZCBnaXZlIHVw IG9uIGEgdmVuZG9yIHNwZWNpZmljIGJsYWNrbGlzdCBhbmQgYXBwbHkKPiA+IHRoZSB3b3JrYXJv dW5kIGZvciBhbnl0aGluZyA8IEdFTjYuCj4gCj4gSSB3b3VsZCBub3QgdHJ1c3QganVzdCB1c2Vy IGZlZWRiYWNrIG9uIHRoaXMuIERvIHlvdSBoYXZlIHNvbWUgSFcga25vd2xlZGdlCj4gZnJvbSBj aGlwcywgcmVmZXJlbmNlIGRlc2luZ3Mgb24gbW90aGVyIGJvYXJkcywgYW5kIEJJT1Mga25vd2xl ZGdlCj4gd2hpY2ggc3VwcG9ydHMgZW5hYmxpbmcgdGhpcyBwb3dlcm9mZl9sYXRlIGFuZCByZWxh dGVkIHdvcmthcm91bmQgZm9yIGFsbAo+IGRldmljZXMgb2xkZXIgdGhhbiBHRU42PwoKSSBkb24n dCBoYXZlIGtub3dsZWRnZSBhYm91dCB0aGUgQklPUyBpbnRlcm5hbHMgYW5kIEknbSBub3Qgc3Vy ZSBob3cKcmVhc29uYWJsZSBpdCBpcyB0byBrbm93IGFib3V0IGVhY2ggdmVuZG9yJ3MgaW1wbGVt ZW50YXRpb24uIFdoYXQgd2UKa25vdyBpcyB0aGF0IEFDUEkgbWFuZGF0ZXMgdGhhdCB0aGUgT1Mg cHV0cyBub24td2FrZXVwIGRldmljZXMgaW50byBQQ0kKRDMgc3RhdGUgZHVyaW5nIFM0LgoKPiBB bHNvLCBob3cgZG9lcyBpdCB3b3JrIG9uIFdpbmRvd3MgYW5kIG9uIE9TIFggKGlmIHRoYXQncyBy ZWxldmFudCk/CgpJIGRvbid0IGhhdmUgdGhlIGluZm8gb24gdGhpcy4gSXQgd291bGQgYmUgaW50 ZXJlc3RpbmcgdG8ga25vdywgYnV0IEkKd291bGRuJ3QgZmVlbCBjb21wbGV0ZWx5IGNvbmZpZGVu dCBlaXRoZXIgdG8ganVzdCBkbyB0aGUgc2FtZSBhcyBhIGdpdmVuCnZlcnNpb24gb2YgYSBnaXZl biBPUy4KCj4gPiBBYm91dCBjb21wbGV0ZWx5IHJldmVydGluZyB0aGUgb3JpZ2luYWwKPiA+IGNv bW1pdCBkYTJiYzFiOWRiMzM1MWFkZGQyOTNlNWI4Mjc1N2VmZTFmNzdlZDFkCj4gPiBBdXRob3I6 IEltcmUgRGVhayA8aW1yZS5kZWFrQGludGVsLmNvbT4KPiA+IERhdGU6ICAgVGh1IE9jdCAyMyAx OToyMzoyNiAyMDE0ICswMzAwCj4gPiAKPiA+ICAgICBkcm0vaTkxNTogYWRkIHBvd2Vyb2ZmX2xh dGUgaGFuZGxlcgo+ID4gCj4gPiBJIHN0aWxsIGJlbGlldmUgdGhhdCB0aGUgbm9ybWFsIHRoaW5n IHRvIGRvIGlzIHRvIHBvd2VyIG9mZiB0aGUgZGV2aWNlCj4gPiBkdXJpbmcgUzQuIFRoaXMgaXMg dGhlIGRlZmF1bHQgYWN0aW9uIHRha2VuIGJ5IHRoZSBrZXJuZWwncyBQQ0kgY29yZSBmb3IKPiA+ IGV2ZXJ5IGRldmljZS4gUzQgaXMgbm90IGEgc3RhdGUgd2hlcmUgaXQnZCBiZSBndWFyYW50ZWVk IHRoYXQgYWxsCj4gPiBkZXZpY2VzIGFyZSBwb3dlcmVkIG9mZiwgdGhlcmUgbWF5IGJlIHdha2Ut dXAgZGV2aWNlcyB0aGF0IGFyZSBzdGlsbAo+ID4gcG93ZXJlZCBmb3IgZXhhbXBsZSwgc28gcG93 ZXJpbmcgb2ZmIGFueSBkZXZpY2VzIGV4cGxpY2l0bHkgdGhhdCBhcmUgbm90Cj4gPiB3YWtlLXVw IHNvdXJjZXMgbWFrZXMgc2Vuc2UgdG8gbWUuIEkgdGhpbmsgd2UgbmVlZCBhIHBvaW50IHdoZXJl IHdlIHN0b3AKPiA+IGFwcGx5aW5nIHRoaXMgd29ya2Fyb3VuZCBhbmQgR0VONiBzZWVtcyBsaWtl IGEgZ29vZCBwb2ludCBmb3IgdGhhdCwKPiA+IHNpbmNlIEkgaGF2ZW4ndCBzZWVuIGFueSByZXBv cnQgcGFzdCBHRU41Lgo+IAo+IEFzIGEgTGludXggdXNlciwgSSdkIGp1c3QgbGlrZSB0byBiZSBt b3JlIGNvbmZpZGVudCB0aGF0IGRhMmJjMWI5ZGIzMzUxYWRkIGFuZAo+IHdvcmthcm91bmQgZm9y IGFsbCBjaGlwcyBvbGRlciB0aGFuIEdFTjYgaXMgdGhlIHJpZ2h0IHRoaW5nIHRvIGRvLiBVc2Vy Cj4gdGVzdGluZyBzaG91bGRuJ3QgYmUgdGhlIG9ubHkgY3JpdGVyaWEuCgpXZSBoYWQgdGhlIHdv cmthcm91bmQgaW4gcGxhY2UgYmVmb3JlIGRhMmJjMWI5ZGIzMzUgZm9yIGFsbCBwbGF0Zm9ybXMs Cm1lYW5pbmcgd2Uga2VwdCB0aGUgZGV2aWNlIGluIEQwIHN0YXRlIGR1cmluZyBoaWJlcm5hdGlv bi4gV2hhdCB3ZSBhcmUKYWltaW5nIGF0IG5vdyBpcyB0byByZW1vdmUgdGhpcyB3b3JrYXJvdW5k IHRvIGFsaWduIHdpdGggdGhlIEFDUEkgc3BlYwphbmQgdG8gcHJlcGFyZSBmb3IgYSBmdXR1cmUg c3RhdGUgd2hlcmUgd2UgY2FuIHNpbXBseSBsZWF2ZSB0aGUgZGV2aWNlCmluIHJ1bnRpbWUgc3Vz cGVuZGVkIHN0YXRlIGlmIGl0IHdhcyBhbHJlYWR5IHJ1bnRpbWUgc3VzcGVuZGVkIHdoZW4KaGli ZXJuYXRpb24gc3RhcnRzLgoKUmVtb3ZpbmcgdGhlIHdvcmthcm91bmQgdHVybmVkIG91dCB0byBi ZSBhIGJhZCBpZGVhIG9uIG9sZCBwbGF0Zm9ybXMsCndoZXJlIHdlIGhhdmUgQklPU2VzIHRoYXQg ZGVwZW5kIG9uIHRoZSBHRlggZGV2aWNlIGJlaW5nIGluIEQwIHN0YXRlCmR1cmluZyBoaWJlcm5h dGlvbiAoY29udHJhZGljdGluZyB0aGUgc3BlYykuCgpJIGRvbid0IGhhdmUgYSBiZXR0ZXIgaWRl YSBub3cgdG8gYWRkcmVzcyB0aGUgYWJvdmUgaXNzdWVzIHRoYW4KcmVzdG9yaW5nIHRoZSB3b3Jr YXJvdW5kIGZvciB0aG9zZSBvbGQgcGxhdGZvcm1zLgoKLS1JbXJlCgpfX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZnggbWFpbGluZyBsaXN0Cklu dGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9y Zy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932302AbbFWMX2 (ORCPT ); Tue, 23 Jun 2015 08:23:28 -0400 Received: from mga09.intel.com ([134.134.136.24]:3389 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752669AbbFWMXU (ORCPT ); Tue, 23 Jun 2015 08:23:20 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,665,1427785200"; d="scan'208";a="512906807" Message-ID: <1435062195.30781.38.camel@intel.com> Subject: Re: [PATCH] drm/i915: enable BIOS hang workaround for Lenovo T60 too From: Imre Deak Reply-To: imre.deak@intel.com To: Mikko Rapeli Cc: Paul Bolle , Daniel Vetter , linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Jani Nikula , Ville =?ISO-8859-1?Q?Syrj=E4l=E4?= , Ilya Tumaykin , DirkGriesbach , "Rafael J. Wysocki" Date: Tue, 23 Jun 2015 15:23:15 +0300 In-Reply-To: <20150623104214.GG9187@lakka.kapsi.fi> References: <1434694676-2039-1-git-send-email-mikko.rapeli@iki.fi> <20150619154431.GD25769@phenom.ffwll.local> <1434731815.2385.157.camel@x220> <1434980630.31905.88.camel@intel.com> <20150623104214.GG9187@lakka.kapsi.fi> Organization: Intel Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.12.11-0ubuntu3 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On ti, 2015-06-23 at 13:42 +0300, Mikko Rapeli wrote: > Hi Imre, > > On Mon, Jun 22, 2015 at 04:43:50PM +0300, Imre Deak wrote: > > > > To summarize, since we extended the range of platforms to apply the > > workaround in > > commit ab3be73fa7b43f4c3648ce29b5fd649ea54d3adb > > Author: Imre Deak > > Date: Mon Mar 2 13:04:41 2015 +0200 > > > > drm/i915: gen4: work around hang during hibernation > > > > we had the following reports I know of with the same issue: > > - Acer Aspire 1830T by Ilya (Gen5) [1] > > - Fujitsu FSC S7110 by Dirk (Gen4.5) [2] > > - ThinkPad X60 by Pavel (Gen4.5) [3] > > - ThinkPad T60 by Mikko (Gen4.5) [4] > > - ThinkPad X41 by Paul (Gen3) [5] > > > > Based on this I would give up on a vendor specific blacklist and apply > > the workaround for anything < GEN6. > > I would not trust just user feedback on this. Do you have some HW knowledge > from chips, reference desings on mother boards, and BIOS knowledge > which supports enabling this poweroff_late and related workaround for all > devices older than GEN6? I don't have knowledge about the BIOS internals and I'm not sure how reasonable it is to know about each vendor's implementation. What we know is that ACPI mandates that the OS puts non-wakeup devices into PCI D3 state during S4. > Also, how does it work on Windows and on OS X (if that's relevant)? I don't have the info on this. It would be interesting to know, but I wouldn't feel completely confident either to just do the same as a given version of a given OS. > > About completely reverting the original > > commit da2bc1b9db3351addd293e5b82757efe1f77ed1d > > Author: Imre Deak > > Date: Thu Oct 23 19:23:26 2014 +0300 > > > > drm/i915: add poweroff_late handler > > > > I still believe that the normal thing to do is to power off the device > > during S4. This is the default action taken by the kernel's PCI core for > > every device. S4 is not a state where it'd be guaranteed that all > > devices are powered off, there may be wake-up devices that are still > > powered for example, so powering off any devices explicitly that are not > > wake-up sources makes sense to me. I think we need a point where we stop > > applying this workaround and GEN6 seems like a good point for that, > > since I haven't seen any report past GEN5. > > As a Linux user, I'd just like to be more confident that da2bc1b9db3351add and > workaround for all chips older than GEN6 is the right thing to do. User > testing shouldn't be the only criteria. We had the workaround in place before da2bc1b9db335 for all platforms, meaning we kept the device in D0 state during hibernation. What we are aiming at now is to remove this workaround to align with the ACPI spec and to prepare for a future state where we can simply leave the device in runtime suspended state if it was already runtime suspended when hibernation starts. Removing the workaround turned out to be a bad idea on old platforms, where we have BIOSes that depend on the GFX device being in D0 state during hibernation (contradicting the spec). I don't have a better idea now to address the above issues than restoring the workaround for those old platforms. --Imre