From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shobhit Kumar Subject: [v3 4/7] mfd: intel_soc_pmic_core: ADD PWM lookup table for CRC PMIC based PWM Date: Fri, 26 Jun 2015 14:32:07 +0530 Message-ID: <1435309330-50725-5-git-send-email-shobhit.kumar@intel.com> References: <1435309330-50725-1-git-send-email-shobhit.kumar@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1435309330-50725-1-git-send-email-shobhit.kumar@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: linux-pwm , intel-gfx , linux-kernel , dri-devel , linux-gpio Cc: Alexandre Courbot , Paul Bolle , Samuel Ortiz , Povilas Staniulis , Jani Nikula , Shobhit Kumar , Linus Walleij , varkabhadram@gmail.com, Paul Gortmaker , bloften80@gmail.com, David Airlie , Chih-Wei Huang , Thierry Reding , Daniel Vetter , Lee Jones List-Id: linux-gpio@vger.kernel.org T24gc29tZSBCWVQgUExhdGZvcm0gdGhlIFBXTSBpcyBjb250cm9sbGVkIHVzaW5nIENSQyBQTUlD LiBBZGQgYSBsb29rdXAKZW50cnkgZm9yIHRoZSBzYW1lIHRvIGJlIHVzZWQgYnkgdGhlIGNvbnN1 bWVyIChJbnRlbCBHRlgpCgpDQzogU2FtdWVsIE9ydGl6IDxzYW1lb0BsaW51eC5pbnRlbC5jb20+ CkNjOiBMaW51cyBXYWxsZWlqIDxsaW51cy53YWxsZWlqQGxpbmFyby5vcmc+CkNjOiBBbGV4YW5k cmUgQ291cmJvdCA8Z251cm91QGdtYWlsLmNvbT4KQ2M6IFRoaWVycnkgUmVkaW5nIDx0aGllcnJ5 LnJlZGluZ0BnbWFpbC5jb20+CkFja2VkLWJ5OiBMZWUgSm9uZXMgPGxlZS5qb25lc0BsaW5hcm8u b3JnPgpUZXN0ZWQtYnk6IFZpbGxlIFN5cmrDpGzDpCA8dmlsbGUuc3lyamFsYUBsaW51eC5pbnRl bC5jb20+ClNpZ25lZC1vZmYtYnk6IFNob2JoaXQgS3VtYXIgPHNob2JoaXQua3VtYXJAaW50ZWwu Y29tPgotLS0KdjI6IFJlbW92ZSB0aGUgbG9va3VwIHRhYmxlIG9uIGRyaXZlciB1bmxvYWQgKFRo aWVycnkpCgp2MzogQ29ycmVjdCB0aGUgc3ViamVjdCBsaW5lIChMZWUgam9uZXMpCgogZHJpdmVy cy9tZmQvaW50ZWxfc29jX3BtaWNfY29yZS5jIHwgMTIgKysrKysrKysrKysrCiAxIGZpbGUgY2hh bmdlZCwgMTIgaW5zZXJ0aW9ucygrKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvbWZkL2ludGVsX3Nv Y19wbWljX2NvcmUuYyBiL2RyaXZlcnMvbWZkL2ludGVsX3NvY19wbWljX2NvcmUuYwppbmRleCBm M2Q5MThlLi5hMDBkZGQ5IDEwMDY0NAotLS0gYS9kcml2ZXJzL21mZC9pbnRlbF9zb2NfcG1pY19j b3JlLmMKKysrIGIvZHJpdmVycy9tZmQvaW50ZWxfc29jX3BtaWNfY29yZS5jCkBAIC0yNSw2ICsy NSw3IEBACiAjaW5jbHVkZSA8bGludXgvcmVnbWFwLmg+CiAjaW5jbHVkZSA8bGludXgvbWZkL2lu dGVsX3NvY19wbWljLmg+CiAjaW5jbHVkZSA8bGludXgvZ3Bpby9tYWNoaW5lLmg+CisjaW5jbHVk ZSA8bGludXgvcHdtLmg+CiAjaW5jbHVkZSAiaW50ZWxfc29jX3BtaWNfY29yZS5oIgogCiAvKiBM b29rdXAgdGFibGUgZm9yIHRoZSBQYW5lbCBFbmFibGUvRGlzYWJsZSBsaW5lIGFzIEdQSU8gc2ln bmFscyAqLwpAQCAtMzcsNiArMzgsMTEgQEAgc3RhdGljIHN0cnVjdCBncGlvZF9sb29rdXBfdGFi bGUgcGFuZWxfZ3Bpb190YWJsZSA9IHsKIAl9LAogfTsKIAorLyogUFdNIGNvbnN1bWVkIGJ5IHRo ZSBJbnRlbCBHRlggKi8KK3N0YXRpYyBzdHJ1Y3QgcHdtX2xvb2t1cCBjcmNfcHdtX2xvb2t1cFtd ID0geworCVBXTV9MT09LVVAoImNyeXN0YWxfY292ZV9wd20iLCAwLCAiMDAwMDowMDowMi4wIiwg InB3bV9iYWNrbGlnaHQiLCAwLCBQV01fUE9MQVJJVFlfTk9STUFMKSwKK307CisKIHN0YXRpYyBp bnQgaW50ZWxfc29jX3BtaWNfZmluZF9ncGlvX2lycShzdHJ1Y3QgZGV2aWNlICpkZXYpCiB7CiAJ c3RydWN0IGdwaW9fZGVzYyAqZGVzYzsKQEAgLTk5LDYgKzEwNSw5IEBAIHN0YXRpYyBpbnQgaW50 ZWxfc29jX3BtaWNfaTJjX3Byb2JlKHN0cnVjdCBpMmNfY2xpZW50ICppMmMsCiAJLyogQWRkIGxv b2t1cCB0YWJsZSBiaW5kaW5nIGZvciBQYW5lbCBDb250cm9sIHRvIHRoZSBHUElPIENoaXAgKi8K IAlncGlvZF9hZGRfbG9va3VwX3RhYmxlKCZwYW5lbF9ncGlvX3RhYmxlKTsKIAorCS8qIEFkZCBs b29rdXAgdGFibGUgZm9yIGNyYy1wd20gKi8KKwlwd21fYWRkX3RhYmxlKGNyY19wd21fbG9va3Vw LCBBUlJBWV9TSVpFKGNyY19wd21fbG9va3VwKSk7CisKIAlyZXQgPSBtZmRfYWRkX2RldmljZXMo ZGV2LCAtMSwgY29uZmlnLT5jZWxsX2RldiwKIAkJCSAgICAgIGNvbmZpZy0+bl9jZWxsX2RldnMs IE5VTEwsIDAsCiAJCQkgICAgICByZWdtYXBfaXJxX2dldF9kb21haW4ocG1pYy0+aXJxX2NoaXBf ZGF0YSkpOwpAQCAtMTIxLDYgKzEzMCw5IEBAIHN0YXRpYyBpbnQgaW50ZWxfc29jX3BtaWNfaTJj X3JlbW92ZShzdHJ1Y3QgaTJjX2NsaWVudCAqaTJjKQogCS8qIFJlbW92ZSBsb29rdXAgdGFibGUg Zm9yIFBhbmVsIENvbnRyb2wgZnJvbSB0aGUgR1BJTyBDaGlwICovCiAJZ3Bpb2RfcmVtb3ZlX2xv b2t1cF90YWJsZSgmcGFuZWxfZ3Bpb190YWJsZSk7CiAKKwkvKiByZW1vdmUgY3JjLXB3bSBsb29r dXAgdGFibGUgKi8KKwlwd21fcmVtb3ZlX3RhYmxlKGNyY19wd21fbG9va3VwLCBBUlJBWV9TSVpF KGNyY19wd21fbG9va3VwKSk7CisKIAltZmRfcmVtb3ZlX2RldmljZXMoJmkyYy0+ZGV2KTsKIAog CXJldHVybiAwOwotLSAKMS45LjEKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVk ZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8v aW50ZWwtZ2Z4Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752760AbbFZJDT (ORCPT ); Fri, 26 Jun 2015 05:03:19 -0400 Received: from mga02.intel.com ([134.134.136.20]:12120 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751751AbbFZJC7 (ORCPT ); Fri, 26 Jun 2015 05:02:59 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,683,1427785200"; d="scan'208";a="718042778" From: Shobhit Kumar To: linux-pwm , intel-gfx , linux-kernel , dri-devel , linux-gpio Cc: Paul Bolle , Jani Nikula , Samuel Ortiz , Alexandre Courbot , David Airlie , Povilas Staniulis , Chih-Wei Huang , Thierry Reding , Daniel Vetter , Lee Jones , Linus Walleij , Paul Gortmaker , bloften80@gmail.com, varkabhadram@gmail.com, Shobhit Kumar Subject: [v3 4/7] mfd: intel_soc_pmic_core: ADD PWM lookup table for CRC PMIC based PWM Date: Fri, 26 Jun 2015 14:32:07 +0530 Message-Id: <1435309330-50725-5-git-send-email-shobhit.kumar@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1435309330-50725-1-git-send-email-shobhit.kumar@intel.com> References: <1435309330-50725-1-git-send-email-shobhit.kumar@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On some BYT PLatform the PWM is controlled using CRC PMIC. Add a lookup entry for the same to be used by the consumer (Intel GFX) CC: Samuel Ortiz Cc: Linus Walleij Cc: Alexandre Courbot Cc: Thierry Reding Acked-by: Lee Jones Tested-by: Ville Syrjälä Signed-off-by: Shobhit Kumar --- v2: Remove the lookup table on driver unload (Thierry) v3: Correct the subject line (Lee jones) drivers/mfd/intel_soc_pmic_core.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/mfd/intel_soc_pmic_core.c b/drivers/mfd/intel_soc_pmic_core.c index f3d918e..a00ddd9 100644 --- a/drivers/mfd/intel_soc_pmic_core.c +++ b/drivers/mfd/intel_soc_pmic_core.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "intel_soc_pmic_core.h" /* Lookup table for the Panel Enable/Disable line as GPIO signals */ @@ -37,6 +38,11 @@ static struct gpiod_lookup_table panel_gpio_table = { }, }; +/* PWM consumed by the Intel GFX */ +static struct pwm_lookup crc_pwm_lookup[] = { + PWM_LOOKUP("crystal_cove_pwm", 0, "0000:00:02.0", "pwm_backlight", 0, PWM_POLARITY_NORMAL), +}; + static int intel_soc_pmic_find_gpio_irq(struct device *dev) { struct gpio_desc *desc; @@ -99,6 +105,9 @@ static int intel_soc_pmic_i2c_probe(struct i2c_client *i2c, /* Add lookup table binding for Panel Control to the GPIO Chip */ gpiod_add_lookup_table(&panel_gpio_table); + /* Add lookup table for crc-pwm */ + pwm_add_table(crc_pwm_lookup, ARRAY_SIZE(crc_pwm_lookup)); + ret = mfd_add_devices(dev, -1, config->cell_dev, config->n_cell_devs, NULL, 0, regmap_irq_get_domain(pmic->irq_chip_data)); @@ -121,6 +130,9 @@ static int intel_soc_pmic_i2c_remove(struct i2c_client *i2c) /* Remove lookup table for Panel Control from the GPIO Chip */ gpiod_remove_lookup_table(&panel_gpio_table); + /* remove crc-pwm lookup table */ + pwm_remove_table(crc_pwm_lookup, ARRAY_SIZE(crc_pwm_lookup)); + mfd_remove_devices(&i2c->dev); return 0; -- 1.9.1