[U-Boot] [PATCH v2 2/4] nand: lpc32xx: add SLC NAND controller support

[Scott Wood <scottwood@freescale.com>]

On Sat, 2015-07-18 at 02:38 +0300, Vladimir Zapolskiy wrote:
> Hello Scott,
> 
> On 18.07.2015 02:12, Scott Wood wrote:
> > On Sat, 2015-07-18 at 01:47 +0300, Vladimir Zapolskiy wrote:
> > > +/*
> > > + * LPC32xx has only one SLC NAND controller, don't utilize
> > > + * CONFIG_SYS_NAND_SELF_INIT to be able to reuse this function
> > > + * both in SPL NAND and U-boot images.
> > > + */
> > > +int board_nand_init(struct nand_chip *lpc32xx_chip)
> > > +{
> > > +     lpc32xx_chip->cmd_ctrl  = lpc32xx_nand_cmd_ctrl;
> > > +     lpc32xx_chip->dev_ready = lpc32xx_nand_dev_ready;
> > > +
> > > +     /*
> > > +      * Hardware ECC calculation is not supported by the driver,
> > > +      * because it requires DMA support, see LPC32x0 User Manual,
> > > +      * note after SLC_ECC register description (UM10326, p.198)
> > > +      */
> > > +     lpc32xx_chip->ecc.mode  = NAND_ECC_SOFT;
> > > +
> > > +     /*
> > > +      * The implementation of these functions is quite common, but
> > > +      * they MUST be defined, because access to data register
> > > +      * is strictly 32-bit aligned.
> > > +      */
> > > +     lpc32xx_chip->read_buf  = lpc32xx_read_buf;
> > > +     lpc32xx_chip->read_byte = lpc32xx_read_byte;
> > > +     lpc32xx_chip->write_buf = lpc32xx_write_buf;
> > > +     lpc32xx_chip->write_byte        = lpc32xx_write_byte;
> > > +
> > > +     /*
> > > +      * Use default ECC layout, but these values are predefined
> > > +      * for both small and large page NAND flash devices.
> > > +      */
> > > +     lpc32xx_chip->ecc.size  = 256;
> > > +     lpc32xx_chip->ecc.bytes = 3;
> > > +     lpc32xx_chip->ecc.strength      = 1;
> > 
> > Please use a space before '=', not a tab.  This doesn't even line up 
> > right, 
> > if that's what you were trying to do...
> 
> Right, that's my intention. I have no objection to non-leading spaces.

It looks the same in v3.

-Scott