From: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
To: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
Cc: jroedel-l3A5Bk7waGM@public.gmane.org,
marc.zyngier-5wv7dgnIgG8@public.gmane.org,
Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
laurent.pinchart+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: [PATCH 06/13] iommu/arm-smmu: Clean up DMA API usage
Date: Mon, 3 Aug 2015 14:25:48 +0100 [thread overview]
Message-ID: <1438608355-7335-7-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1438608355-7335-1-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
From: Robin Murphy <Robin.Murphy-5wv7dgnIgG8@public.gmane.org>
With the correct DMA API calls now integrated into the io-pgtable code,
let that handle the flushing of non-coherent page table updates.
Signed-off-by: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>
Signed-off-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
---
drivers/iommu/arm-smmu.c | 22 ++++++----------------
1 file changed, 6 insertions(+), 16 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 0583ed2f33c0..5770ab98fa38 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -611,24 +611,13 @@ static void arm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size,
static void arm_smmu_flush_pgtable(void *addr, size_t size, void *cookie)
{
struct arm_smmu_domain *smmu_domain = cookie;
- struct arm_smmu_device *smmu = smmu_domain->smmu;
- unsigned long offset = (unsigned long)addr & ~PAGE_MASK;
-
- /* Ensure new page tables are visible to the hardware walker */
- if (smmu->features & ARM_SMMU_FEAT_COHERENT_WALK) {
+ /*
+ * Ensure new page tables are visible to a coherent hardware walker.
+ * The page table code deals with flushing for the non-coherent case.
+ */
+ if (smmu_domain->smmu->features & ARM_SMMU_FEAT_COHERENT_WALK)
dsb(ishst);
- } else {
- /*
- * If the SMMU can't walk tables in the CPU caches, treat them
- * like non-coherent DMA since we need to flush the new entries
- * all the way out to memory. There's no possibility of
- * recursion here as the SMMU table walker will not be wired
- * through another SMMU.
- */
- dma_map_page(smmu->dev, virt_to_page(addr), offset, size,
- DMA_TO_DEVICE);
- }
}
static struct iommu_gather_ops arm_smmu_gather_ops = {
@@ -899,6 +888,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
.ias = ias,
.oas = oas,
.tlb = &arm_smmu_gather_ops,
+ .iommu_dev = smmu->dev,
};
smmu_domain->smmu = smmu;
--
2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 06/13] iommu/arm-smmu: Clean up DMA API usage
Date: Mon, 3 Aug 2015 14:25:48 +0100 [thread overview]
Message-ID: <1438608355-7335-7-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1438608355-7335-1-git-send-email-will.deacon@arm.com>
From: Robin Murphy <Robin.Murphy@arm.com>
With the correct DMA API calls now integrated into the io-pgtable code,
let that handle the flushing of non-coherent page table updates.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
drivers/iommu/arm-smmu.c | 22 ++++++----------------
1 file changed, 6 insertions(+), 16 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 0583ed2f33c0..5770ab98fa38 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -611,24 +611,13 @@ static void arm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size,
static void arm_smmu_flush_pgtable(void *addr, size_t size, void *cookie)
{
struct arm_smmu_domain *smmu_domain = cookie;
- struct arm_smmu_device *smmu = smmu_domain->smmu;
- unsigned long offset = (unsigned long)addr & ~PAGE_MASK;
-
- /* Ensure new page tables are visible to the hardware walker */
- if (smmu->features & ARM_SMMU_FEAT_COHERENT_WALK) {
+ /*
+ * Ensure new page tables are visible to a coherent hardware walker.
+ * The page table code deals with flushing for the non-coherent case.
+ */
+ if (smmu_domain->smmu->features & ARM_SMMU_FEAT_COHERENT_WALK)
dsb(ishst);
- } else {
- /*
- * If the SMMU can't walk tables in the CPU caches, treat them
- * like non-coherent DMA since we need to flush the new entries
- * all the way out to memory. There's no possibility of
- * recursion here as the SMMU table walker will not be wired
- * through another SMMU.
- */
- dma_map_page(smmu->dev, virt_to_page(addr), offset, size,
- DMA_TO_DEVICE);
- }
}
static struct iommu_gather_ops arm_smmu_gather_ops = {
@@ -899,6 +888,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
.ias = ias,
.oas = oas,
.tlb = &arm_smmu_gather_ops,
+ .iommu_dev = smmu->dev,
};
smmu_domain->smmu = smmu;
--
2.1.4
next prev parent reply other threads:[~2015-08-03 13:25 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-03 13:25 [PATCH 00/13] iommu/arm-smmu: Updates for 4.3 Will Deacon
2015-08-03 13:25 ` Will Deacon
[not found] ` <1438608355-7335-1-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2015-08-03 13:25 ` [PATCH 01/13] iommu/arm-smmu: Fix enabling of PRIQ interrupt Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 02/13] iommu/arm-smmu: Fix MSI memory attributes to match specification Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 03/13] iommu/arm-smmu: Limit 2-level strtab allocation for small SID sizes Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 04/13] iommu/arm-smmu: Sort out coherency Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 05/13] iommu/io-pgtable-arm: Allow appropriate DMA API use Will Deacon
2015-08-03 13:25 ` Will Deacon
[not found] ` <1438608355-7335-6-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2015-08-04 13:16 ` Laurent Pinchart
2015-08-04 13:16 ` Laurent Pinchart
2015-08-04 14:47 ` Robin Murphy
2015-08-04 14:47 ` Robin Murphy
[not found] ` <55C0D071.1040104-5wv7dgnIgG8@public.gmane.org>
2015-08-04 14:56 ` Russell King - ARM Linux
2015-08-04 14:56 ` Russell King - ARM Linux
[not found] ` <20150804145642.GQ7557-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2015-08-04 20:54 ` Laurent Pinchart
2015-08-04 20:54 ` Laurent Pinchart
2015-08-05 16:24 ` Will Deacon
2015-08-05 16:24 ` Will Deacon
[not found] ` <20150805162452.GH6092-5wv7dgnIgG8@public.gmane.org>
2015-08-06 19:10 ` Laurent Pinchart
2015-08-06 19:10 ` Laurent Pinchart
2015-08-03 13:25 ` Will Deacon [this message]
2015-08-03 13:25 ` [PATCH 06/13] iommu/arm-smmu: Clean up DMA API usage Will Deacon
2015-08-03 13:25 ` [PATCH 07/13] " Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 08/13] iommu/ipmmu-vmsa: " Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 09/13] iommu/io-pgtable-arm: Centralise sync points Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 10/13] iommu/arm-smmu: Remove arm_smmu_flush_pgtable() Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 11/13] " Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 12/13] iommu/io-pgtable: Remove flush_pgtable callback Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 13/13] iommu/arm-smmu: Treat unknown OAS as 48-bit Will Deacon
2015-08-03 13:25 ` Will Deacon
[not found] ` <1438608355-7335-14-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2015-08-03 18:23 ` Sergei Shtylyov
2015-08-03 18:23 ` Sergei Shtylyov
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