From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.transmode.se ([31.15.61.139]:54781 "EHLO smtp.transmode.se" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751309AbbHJPgf convert rfc822-to-8bit (ORCPT ); Mon, 10 Aug 2015 11:36:35 -0400 From: Joakim Tjernlund To: "stable@vger.kernel.org" , "jslaby@suse.cz" CC: "ulf.hansson@linaro.org" Subject: Re: [patch added to the 3.12 stable tree] mmc: sdhci-esdhc: Make 8BIT bus work Date: Mon, 10 Aug 2015 15:27:00 +0000 Message-ID: <1439220420.3120.83.camel@transmode.se> References: <1439216287-26416-1-git-send-email-jslaby@suse.cz> <1439216287-26416-12-git-send-email-jslaby@suse.cz> In-Reply-To: <1439216287-26416-12-git-send-email-jslaby@suse.cz> Content-Language: en-US Content-Type: text/plain; charset=US-ASCII Content-ID: <80D7E04395ED8645811DE96EF62A5A01@transmode.com> Content-Transfer-Encoding: 7BIT MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org List-ID: On Mon, 2015-08-10 at 16:17 +0200, Jiri Slaby wrote: > From: Joakim Tjernlund > > This patch has been added to the 3.12 stable tree. If you have any > objections, please let us know. I think 8BIT support was added after 3.12 and if so I do not think this is appropriate for 3.12 Jocke > > =============== > > commit 8e91125ff3f57f15c6568e2a6d32743b3f7815e4 upstream. > > Support for 8BIT bus with was added some time ago to sdhci-esdhc but > then missed to remove the 8BIT from the reserved bit mask which made > 8BIT non functional. > > Fixes: 66b50a00992d ("mmc: esdhc: Add support for 8-bit bus width and..") > Signed-off-by: Joakim Tjernlund > Signed-off-by: Ulf Hansson > Signed-off-by: Jiri Slaby > --- > drivers/mmc/host/sdhci-esdhc.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h > index a2a06420e463..ebff71092743 100644 > --- a/drivers/mmc/host/sdhci-esdhc.h > +++ b/drivers/mmc/host/sdhci-esdhc.h > @@ -47,7 +47,7 @@ > #define ESDHC_DMA_SYSCTL 0x40c > #define ESDHC_DMA_SNOOP 0x00000040 > > -#define ESDHC_HOST_CONTROL_RES 0x05 > +#define ESDHC_HOST_CONTROL_RES 0x01 > > static inline void esdhc_set_clock(struct sdhci_host *host, unsigned int clock, > unsigned int host_clock)