[U-Boot] [PATCH] spi: cadence_qspi: Enable quad mode for read and programming

[Chin Liang See <clsee@altera.com>]

On Wed, 2015-08-26 at 11:07 +0200, marex at denx.de wrote:
> On Wednesday, August 26, 2015 at 10:42:57 AM, Chin Liang See wrote:
> > On Wed, 2015-08-26 at 09:57 +0200, marex at denx.de wrote:
> > > On Wednesday, August 26, 2015 at 09:30:07 AM, Chin Liang See wrote:
> > > > On Wed, 2015-08-26 at 08:57 +0200, marex at denx.de wrote:
> > > > > On Wednesday, August 26, 2015 at 02:09:55 AM, Chin Liang See wrote:
> > > > > > Enable the quad output fast read and quad input fast program
> > > > > > support. Quad mode is supported by Cadence QSPI controller.
> > > > > > 
> > > > > > Signed-off-by: Chin Liang See <clsee@altera.com>
> > > > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > > > > Cc: Stefan Roese <sr@denx.de>
> > > > > > Cc: Vikas Manocha <vikas.manocha@st.com>
> > > > > > Cc: Jagannadh Teki <jteki@openedev.com>
> > > > > > Cc: Pavel Machek <pavel@denx.de>
> > > > > > Cc: Marek Vasut <marex@denx.de>
> > > > > > ---
> > > > > > 
> > > > > >  drivers/spi/cadence_qspi.c     |   11 +++++++++++
> > > > > >  drivers/spi/cadence_qspi_apb.c |   16 ++++++++++++----
> > > > > >  2 files changed, 23 insertions(+), 4 deletions(-)
> > > > > > 
> > > > > > diff --git a/drivers/spi/cadence_qspi.c
> > > > > > b/drivers/spi/cadence_qspi.c index 34a0f46..c6b69c4 100644
> > > > > > --- a/drivers/spi/cadence_qspi.c
> > > > > > +++ b/drivers/spi/cadence_qspi.c
> > > > > > @@ -318,6 +318,16 @@ static int
> > > > > > cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0;
> > > > > > 
> > > > > >  }
> > > > > > 
> > > > > > +static int cadence_spi_child_pre_probe(struct udevice *dev)
> > > > > > +{
> > > > > > +	struct spi_slave *slave = dev_get_parentdata(dev);
> > > > > > +
> > > > > > +	/* Cadence QSPI controller can support quad read and program */
> > > > > > +	slave->op_mode_rx = SPI_OPM_RX_QOF;
> > > > > > +	slave->op_mode_tx = SPI_OPM_TX_QPP;
> > > > > > +	return 0;
> > > > > > +}
> > > > > > +
> > > > > > 
> > > > > >  static const struct dm_spi_ops cadence_spi_ops = {
> > > > > >  
> > > > > >  	.xfer		= cadence_spi_xfer,
> > > > > >  	.set_speed	= cadence_spi_set_speed,
> > > > > > 
> > > > > > @@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = {
> > > > > > 
> > > > > >  	.ofdata_to_platdata = cadence_spi_ofdata_to_platdata,
> > > > > >  	.platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata),
> > > > > >  	.priv_auto_alloc_size = sizeof(struct cadence_spi_priv),
> > > > > > 
> > > > > > +	.child_pre_probe = cadence_spi_child_pre_probe,
> > > > > > 
> > > > > >  	.probe = cadence_spi_probe,
> > > > > >  
> > > > > >  };
> > > > > 
> > > > > Simon, can you please check if this DM bit is correct ?
> > > > > 
> > > > > > diff --git a/drivers/spi/cadence_qspi_apb.c
> > > > > > b/drivers/spi/cadence_qspi_apb.c index d053407..deffb6b 100644
> > > > > > --- a/drivers/spi/cadence_qspi_apb.c
> > > > > > +++ b/drivers/spi/cadence_qspi_apb.c
> > > > > > @@ -29,6 +29,9 @@
> > > > > > 
> > > > > >  #include <asm/io.h>
> > > > > >  #include <asm/errno.h>
> > > > > >  #include "cadence_qspi.h"
> > > > > > 
> > > > > > +#include <spi.h>
> > > > > > +#include <spi_flash.h>
> > > > > > +#include "../mtd/spi/sf_internal.h"
> > > > > 
> > > > > Why do you need this include ?
> > > > 
> > > > Actually I am comparing the opcode to determine whether its a quad
> > > > command. If yes, we need to setup the controller accordingly.
> > > 
> > > Ewww, I think we should implement something similar to:
> > > 
> > > https://lkml.org/lkml/2015/8/24/299
> > > [PATCH linux-next v4 1/5] mtd: spi-nor: notify (Q)SPI controller about
> > > protocol change
> > 
> > Yah, that is a nice enhancement in order to keep up with controller
> > enhancement. We definitely want to explore and enable that at U-Boot in
> > the future.
> 
> You mean you'll implement this functionality and then make your change to
> the QSPI driver to use it, in order to implement things properly ? :) In
> that case, I agree.

Sure, something I can look at in 1-2 months time. I still have laundry
lists on ensuring the mainline SOCFPGA U-Boot has all the essential
features as we have in github. Prior that happen, can I get an ACK from
you? :)

Thanks
Chin Liang