diff for duplicates of <1440614818-25765-1-git-send-email-codekipper@gmail.com> diff --git a/a/1.txt b/N1/1.txt index cb83b9e..bd78c34 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,4 +1,4 @@ -From: Marcus Cooper <codekipper@gmail.com> +From: Marcus Cooper <codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> The A20-SOM-EVB is a reference design of a 2-layer board for the A20-SOM. @@ -12,7 +12,7 @@ https://www.olimex.com/Products/SOM/A20/A20-SOM-EVB/ More information on the SOM can be found here http://linux-sunxi.org/Olimex_A20-SOM. -Signed-off-by: Marcus Cooper <codekipper@gmail.com> +Signed-off-by: Marcus Cooper <codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- Changes since v1: - renamed dts from sun7i-a20-olinuxino-evb to sun7i-a20-olimex-som-evb @@ -43,7 +43,7 @@ index 0000000..36d1e77 +++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts @@ -0,0 +1,216 @@ +/* -+ * Copyright 2015 - Marcus Cooper <codekipper@gmail.com> ++ * Copyright 2015 - Marcus Cooper <codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual @@ -145,7 +145,7 @@ index 0000000..36d1e77 + phy-mode = "rgmii"; + status = "okay"; + -+ phy1: ethernet-phy at 1 { ++ phy1: ethernet-phy@1 { + reg = <1>; + }; +}; @@ -155,7 +155,7 @@ index 0000000..36d1e77 + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + -+ axp209: pmic at 34 { ++ axp209: pmic@34 { + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; @@ -187,14 +187,14 @@ index 0000000..36d1e77 +}; + +&pio { -+ ahci_pwr_pin_olimex_som_evb: ahci_pwr_pin at 1 { ++ ahci_pwr_pin_olimex_som_evb: ahci_pwr_pin@1 { + allwinner,pins = "PC3"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + -+ led_pins_olimex_som_evb: led_pins at 0 { ++ led_pins_olimex_som_evb: led_pins@0 { + allwinner,pins = "PH2"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_20_MA>; diff --git a/a/content_digest b/N1/content_digest index f4099d5..2679477 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,10 +1,14 @@ - "From\0codekipper@gmail.com (codekipper at gmail.com)\0" + "From\0codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0" "Subject\0[linux-next][PATCH v2] ARM: sun7i: dt: Add new Olimex A20 EVB device\0" "Date\0Wed, 26 Aug 2015 20:46:58 +0200\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org\0" + "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org + " Marcus Cooper <codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" "\00:1\0" "b\0" - "From: Marcus Cooper <codekipper@gmail.com>\n" + "From: Marcus Cooper <codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" "\n" "The A20-SOM-EVB is a reference design of a 2-layer board for the\n" "A20-SOM.\n" @@ -18,7 +22,7 @@ "More information on the SOM can be found here\n" "http://linux-sunxi.org/Olimex_A20-SOM.\n" "\n" - "Signed-off-by: Marcus Cooper <codekipper@gmail.com>\n" + "Signed-off-by: Marcus Cooper <codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" "---\n" "Changes since v1:\n" "- renamed dts from sun7i-a20-olinuxino-evb to sun7i-a20-olimex-som-evb\n" @@ -49,7 +53,7 @@ "+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts\n" "@@ -0,0 +1,216 @@\n" "+/*\n" - "+ * Copyright 2015 - Marcus Cooper <codekipper@gmail.com>\n" + "+ * Copyright 2015 - Marcus Cooper <codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" "+ *\n" "+ * This file is dual-licensed: you can use it either under the terms\n" "+ * of the GPL or the X11 license, at your option. Note that this dual\n" @@ -151,7 +155,7 @@ "+\tphy-mode = \"rgmii\";\n" "+\tstatus = \"okay\";\n" "+\n" - "+\tphy1: ethernet-phy at 1 {\n" + "+\tphy1: ethernet-phy@1 {\n" "+\t\treg = <1>;\n" "+\t};\n" "+};\n" @@ -161,7 +165,7 @@ "+\tpinctrl-0 = <&i2c0_pins_a>;\n" "+\tstatus = \"okay\";\n" "+\n" - "+\taxp209: pmic at 34 {\n" + "+\taxp209: pmic@34 {\n" "+\t\treg = <0x34>;\n" "+\t\tinterrupt-parent = <&nmi_intc>;\n" "+\t\tinterrupts = <0 IRQ_TYPE_LEVEL_LOW>;\n" @@ -193,14 +197,14 @@ "+};\n" "+\n" "+&pio {\n" - "+\tahci_pwr_pin_olimex_som_evb: ahci_pwr_pin at 1 {\n" + "+\tahci_pwr_pin_olimex_som_evb: ahci_pwr_pin@1 {\n" "+\t\tallwinner,pins = \"PC3\";\n" "+\t\tallwinner,function = \"gpio_out\";\n" "+\t\tallwinner,drive = <SUN4I_PINCTRL_10_MA>;\n" "+\t\tallwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n" "+\t};\n" "+\n" - "+\tled_pins_olimex_som_evb: led_pins at 0 {\n" + "+\tled_pins_olimex_som_evb: led_pins@0 {\n" "+\t\tallwinner,pins = \"PH2\";\n" "+\t\tallwinner,function = \"gpio_out\";\n" "+\t\tallwinner,drive = <SUN4I_PINCTRL_20_MA>;\n" @@ -267,4 +271,4 @@ "-- \n" 2.5.0 -cc26cd96353c8ab4fbdaf1619d8cd3ad9bf5a6d9be44659282be23ab77753126 +9669d2b23d1be832e343e37fea3e9baecc96fb6a41f4b9f765cfd5e3ff685466
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