From: Vikas Shivappa <vikas.shivappa@linux.intel.com>
To: vikas.shivappa@intel.com
Cc: vikas.shivappa@linux.intel.com, x86@kernel.org,
linux-kernel@vger.kernel.org, hpa@zytor.com, tglx@linutronix.de,
mingo@kernel.org, tj@kernel.org, peterz@infradead.org,
matt.fleming@intel.com, will.auld@intel.com,
h.peter.anvin@intel.com, glenn.p.williamson@intel.com,
kanaka.d.juvva@intel.com, bruce.schlobohm@intel.com
Subject: [PATCH 01/11] x86/intel_cqm: Modify hot cpu notification handling
Date: Wed, 9 Sep 2015 12:24:52 -0700 [thread overview]
Message-ID: <1441826702-6975-2-git-send-email-vikas.shivappa@linux.intel.com> (raw)
In-Reply-To: <1441826702-6975-1-git-send-email-vikas.shivappa@linux.intel.com>
- In cqm_pick_event_reader, use the existing package<->core map instead
of looping through all cpus in cqm_cpumask.
- In intel_cqm_cpu_exit, use the same map instead of looping through
all online cpus. In large systems with large number of cpus the time
taken to loop may be expensive and also the time increases linearly.
Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com>
---
arch/x86/kernel/cpu/perf_event_intel_cqm.c | 34 +++++++++++++++---------------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_cqm.c b/arch/x86/kernel/cpu/perf_event_intel_cqm.c
index 377e8f8..93e54ad 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_cqm.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_cqm.c
@@ -62,6 +62,12 @@ static LIST_HEAD(cache_groups);
*/
static cpumask_t cqm_cpumask;
+/*
+ * Temporary cpumask used during hot cpu notificaiton handling. The usage
+ * is serialized by hot cpu locks.
+ */
+static cpumask_t tmp_cpumask;
+
#define RMID_VAL_ERROR (1ULL << 63)
#define RMID_VAL_UNAVAIL (1ULL << 62)
@@ -1244,15 +1250,13 @@ static struct pmu intel_cqm_pmu = {
static inline void cqm_pick_event_reader(int cpu)
{
- int phys_id = topology_physical_package_id(cpu);
- int i;
+ cpumask_and(&tmp_cpumask, &cqm_cpumask, topology_core_cpumask(cpu));
- for_each_cpu(i, &cqm_cpumask) {
- if (phys_id == topology_physical_package_id(i))
- return; /* already got reader for this socket */
- }
-
- cpumask_set_cpu(cpu, &cqm_cpumask);
+ /*
+ * Pick a reader if there isn't one already.
+ */
+ if (cpumask_empty(&tmp_cpumask))
+ cpumask_set_cpu(cpu, &cqm_cpumask);
}
static void intel_cqm_cpu_starting(unsigned int cpu)
@@ -1270,7 +1274,6 @@ static void intel_cqm_cpu_starting(unsigned int cpu)
static void intel_cqm_cpu_exit(unsigned int cpu)
{
- int phys_id = topology_physical_package_id(cpu);
int i;
/*
@@ -1279,15 +1282,12 @@ static void intel_cqm_cpu_exit(unsigned int cpu)
if (!cpumask_test_and_clear_cpu(cpu, &cqm_cpumask))
return;
- for_each_online_cpu(i) {
- if (i == cpu)
- continue;
+ cpumask_and(&tmp_cpumask, topology_core_cpumask(cpu), cpu_online_mask);
+ cpumask_clear_cpu(cpu, &tmp_cpumask);
+ i = cpumask_any(&tmp_cpumask);
- if (phys_id == topology_physical_package_id(i)) {
- cpumask_set_cpu(i, &cqm_cpumask);
- break;
- }
- }
+ if (i < nr_cpu_ids)
+ cpumask_set_cpu(i, &cqm_cpumask);
}
static int intel_cqm_cpu_notifier(struct notifier_block *nb,
--
1.9.1
next prev parent reply other threads:[~2015-09-09 19:24 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-09 19:24 [PATCH V14 0/9] Intel cache allocation and Hot cpu handling changes to cqm, rapl Vikas Shivappa
2015-09-09 19:24 ` Vikas Shivappa [this message]
2015-09-09 19:24 ` [PATCH 02/11] x86/intel_rapl: Modify hot cpu notification handling Vikas Shivappa
2015-09-09 19:24 ` [PATCH 03/11] x86/intel_rdt: Cache Allocation documentation Vikas Shivappa
2015-09-09 19:24 ` [PATCH 04/11] x86/intel_rdt: Add support for Cache Allocation detection Vikas Shivappa
2015-09-09 19:24 ` [PATCH 05/11] x86/intel_rdt: Add Class of service management Vikas Shivappa
2015-09-09 19:24 ` [PATCH 06/11] x86/intel_rdt: Add L3 cache capacity bitmask management Vikas Shivappa
2015-09-09 19:24 ` [PATCH 07/11] x86/intel_rdt: Implement scheduling support for Intel RDT Vikas Shivappa
2015-09-09 19:24 ` [PATCH 08/11] x86/intel_rdt: Hot cpu support for Cache Allocation Vikas Shivappa
2015-09-09 19:25 ` [PATCH 09/11] x86/intel_rdt: Intel haswell Cache Allocation enumeration Vikas Shivappa
2015-09-09 19:25 ` [PATCH 10/11] x86,cgroup/intel_rdt : Add intel_rdt cgroup documentation Vikas Shivappa
2015-09-09 19:25 ` [PATCH 11/11] x86,cgroup/intel_rdt : Add a cgroup interface to manage Intel cache allocation Vikas Shivappa
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1441826702-6975-2-git-send-email-vikas.shivappa@linux.intel.com \
--to=vikas.shivappa@linux.intel.com \
--cc=bruce.schlobohm@intel.com \
--cc=glenn.p.williamson@intel.com \
--cc=h.peter.anvin@intel.com \
--cc=hpa@zytor.com \
--cc=kanaka.d.juvva@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=matt.fleming@intel.com \
--cc=mingo@kernel.org \
--cc=peterz@infradead.org \
--cc=tglx@linutronix.de \
--cc=tj@kernel.org \
--cc=vikas.shivappa@intel.com \
--cc=will.auld@intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.