From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linuxfoundation.org ([140.211.169.12]:54467 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752110AbbIOWKP (ORCPT ); Tue, 15 Sep 2015 18:10:15 -0400 Subject: Patch "drm/amdgpu: fix typo in dce10 watermark setup" has been added to the 4.2-stable tree To: alexander.deucher@amd.com, gregkh@linuxfoundation.org, harry.wentland@amd.com Cc: , From: Date: Tue, 15 Sep 2015 15:10:14 -0700 Message-ID: <144235501489234@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: This is a note to let you know that I've just added the patch titled drm/amdgpu: fix typo in dce10 watermark setup to the 4.2-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: drm-amdgpu-fix-typo-in-dce10-watermark-setup.patch and it can be found in the queue-4.2 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >>From be9fd2e978939ab3e59ee4164fa0893e70359557 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 3 Sep 2015 10:19:03 -0400 Subject: drm/amdgpu: fix typo in dce10 watermark setup From: Alex Deucher commit be9fd2e978939ab3e59ee4164fa0893e70359557 upstream. Using the wrong watermwark value for the secondary watermark. Copy paste typo. Noticed by Mykola. Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c @@ -1331,7 +1331,7 @@ static void dce_v10_0_program_watermarks tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 2); WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, tmp); tmp = RREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset); - tmp = REG_SET_FIELD(tmp, DPG_PIPE_URGENCY_CONTROL, URGENCY_LOW_WATERMARK, latency_watermark_a); + tmp = REG_SET_FIELD(tmp, DPG_PIPE_URGENCY_CONTROL, URGENCY_LOW_WATERMARK, latency_watermark_b); tmp = REG_SET_FIELD(tmp, DPG_PIPE_URGENCY_CONTROL, URGENCY_HIGH_WATERMARK, line_time); WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset, tmp); /* restore original selection */ Patches currently in stable-queue which might be from alexander.deucher@amd.com are queue-4.2/drm-amdgpu-atom-send-out-the-full-aux-address.patch queue-4.2/drm-radeon-atom-send-out-the-full-aux-address.patch queue-4.2/drm-amdgpu-fix-ih-ring-allocation-for-bus-addresses-v2.patch queue-4.2/drm-radeon-don-t-link-train-displayport-on-hpd-until-we-get-the-dpcd.patch queue-4.2/drm-amdgpu-fix-typo-in-dce11-watermark-setup.patch queue-4.2/drm-radeon-native-send-out-the-full-aux-address.patch queue-4.2/drm-amdgpu-don-t-link-train-displayport-on-hpd-until-we-get-the-dpcd.patch queue-4.2/drm-radeon-fix-hdmi-quantization_range-for-pre-dce5-asics.patch queue-4.2/drm-amdgpu-fix-typo-in-dce10-watermark-setup.patch