From: <gregkh@linuxfoundation.org>
To: will.deacon@arm.com, gregkh@linuxfoundation.org, marc.zyngier@arm.com
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "arm64: head.S: initialise mdcr_el2 in el2_setup" has been added to the 3.10-stable tree
Date: Tue, 22 Sep 2015 21:35:39 -0700 [thread overview]
Message-ID: <1442982939220208@kroah.com> (raw)
This is a note to let you know that I've just added the patch titled
arm64: head.S: initialise mdcr_el2 in el2_setup
to the 3.10-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-head.s-initialise-mdcr_el2-in-el2_setup.patch
and it can be found in the queue-3.10 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.
>From d10bcd473301888f957ec4b6b12aa3621be78d59 Mon Sep 17 00:00:00 2001
From: Will Deacon <will.deacon@arm.com>
Date: Wed, 2 Sep 2015 18:49:28 +0100
Subject: arm64: head.S: initialise mdcr_el2 in el2_setup
From: Will Deacon <will.deacon@arm.com>
commit d10bcd473301888f957ec4b6b12aa3621be78d59 upstream.
When entering the kernel at EL2, we fail to initialise the MDCR_EL2
register which controls debug access and PMU capabilities at EL1.
This patch ensures that the register is initialised so that all traps
are disabled and all the PMU counters are available to the host. When a
guest is scheduled, KVM takes care to configure trapping appropriately.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
arch/arm64/kernel/head.S | 5 +++++
1 file changed, 5 insertions(+)
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -184,6 +184,11 @@ ENTRY(el2_setup)
msr hstr_el2, xzr // Disable CP15 traps to EL2
#endif
+ /* EL2 debug */
+ mrs x0, pmcr_el0 // Disable debug access traps
+ ubfx x0, x0, #11, #5 // to EL2 and allow access to
+ msr mdcr_el2, x0 // all PMU counters from EL1
+
/* Stage-2 translation */
msr vttbr_el2, xzr
Patches currently in stable-queue which might be from will.deacon@arm.com are
queue-3.10/arm64-head.s-initialise-mdcr_el2-in-el2_setup.patch
queue-3.10/arm64-kconfig-move-list_poison-to-a-safe-value.patch
queue-3.10/arm64-compat-fix-vfp-save-restore-across-signal-handlers-in-big-endian.patch
reply other threads:[~2015-09-23 4:35 UTC|newest]
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