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From: Nathan Williams <nathan.williams@flightdata.com.au>
To: linux-mtd <linux-mtd@lists.infradead.org>
Subject: UBI on dual NAND chips
Date: Thu, 24 Sep 2015 12:44:50 +1000	[thread overview]
Message-ID: <1443062690.32223.70.camel@ubuntu.flightdata.com.au> (raw)

Hi,

We are planning to use two 32GiB MLC NAND flash chips in a product using
a SoC FPGA with two NAND interfaces. The motivation for wanting to use
multiple NAND chips is to improve reliability, not capacity.

>From what I've read, it's possible to use UBI on a concatenated MTD.
If I have two identical chips, will these be concatenated automatically?

Is creating a single UBI volume over the two NAND chips (and using UBIFS
on it) the best way to make use of a redundant NAND chip? Would
mirroring data on a second UBI volume offer additional improvements to
data reliability?

Also, what's the current status of the "unstable bits issue"?

Thanks,
Nathan

             reply	other threads:[~2015-09-24  2:45 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-24  2:44 Nathan Williams [this message]
2015-09-24  9:02 ` UBI on dual NAND chips Richard Weinberger
2015-09-24 14:22   ` Nathan Williams
     [not found] <A765B125120D1346A63912DDE6D8B6310BF4CAC4@NTXXIAMBX02.xacn.micron.com>
2015-09-25  4:43 ` Nathan Williams
2015-09-25  5:35   ` Bean Huo 霍斌斌 (beanhuo)

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