From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ian Campbell <ian.campbell@citrix.com>
Subject: Re: [PATCH v7 17/28] xen/arm: ITS: Add GITS registers
 emulation
Date: Thu, 24 Sep 2015 12:29:40 +0100
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To: Julien Grall <julien.grall@citrix.com>, Vijay Kilari <vijay.kilari@gmail.com>
Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com>, Prasun Kapoor <Prasun.Kapoor@caviumnetworks.com>, Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>, Tim Deegan <tim@xen.org>, "xen-devel@lists.xen.org" <xen-devel@lists.xen.org>, Stefano Stabellini <stefano.stabellini@citrix.com>, manish.jaggi@caviumnetworks.com
List-Id: xen-devel@lists.xenproject.org

On Thu, 2015-09-24 at 12:05 +0100, Julien Grall wrote:
> On 24/09/15 06:07, Vijay Kilari wrote:
> > On Tue, Sep 22, 2015 at 8:00 PM, Julien Grall <julien.grall@citrix.com>
> > wrote:
> > > Hi Vijay,
> > > 
> > > On 18/09/15 14:09, vijay.kilari@gmail.com wrote:
> > [...]
> > > > +    case 0x0010 ... 0x007c:
> > > > +    case 0xc000 ... 0xffcc:
> > > > +        /* Implementation defined -- write ignored */
> > > > +        goto write_ignore;
> > > > +    case GITS_CBASER:
> > > > +        /* XXX: support 32-bit access */
> > > 
> > > You haven't asked my question on v6... What is missing to support 32
> > > -bt
> > > support? AFAICT the register helpers should the job for you. Correct?
> > 
> >    GITS_CBASER.Physical Address holds bits[47:12], Being at
> > physical address at bits [47:12]  cannot be updated with single 32-bit
> > access.
> 
> I'd like you to explain why GITS_CBASER can't be updated with single
> 32-bit access. Because, based on the spec it's possible (see 8.19.2 ARM
> IHI 0069A):
> 
> "Bits [63:32] and bits [31:0] are accessible separately."

You clearly can't update the entire 47:12 range atomically with a 32-bit
access, which I suppose is what Vijay means.

However, I don't see why it wouldn't be possible to update either bits
[47:32] or [31:12] independently, by modifying just those bits. If for some
reason an OS wanted to do so.

More plausibly an OS might want to change some of the flag bits outside of
the [47:12] range, on either end with a single 32-bit write to just the
half they are trying to change. Writing just [63:32] to flip the valid bit
seems pretty plausible OS behaviour.

> Ian