Re: Write errors on Cherrytrail eMMC

[Bastien Nocera <hadess@hadess.net>]

On Fri, 2015-10-16 at 12:08 +0200, Bastien Nocera wrote:
> On Sun, 2015-10-11 at 19:45 +0200, Bastien Nocera wrote:
> > On Sat, 2015-10-10 at 09:05 +0800, Shawn Lin wrote:
> > > 
> > <snip>
> > > No, sdhci finally complete the tansfer. So, you can try to
> > > augment
> > > the 
> > > timeout [here, mod_timer(&host->timer, timeout)] to see how the
> > > things 
> > > going.
> > 
> > I applied this patch to get some more debug, and increase the
> > default
> > timeout. I'm not certain this was actually used for all the
> > codepaths,
> > but I certainly saw that it was getting applied at least in some
> > cases.
> > 
> > What would those errors be this time?
> 
> Looks like one of:
> commit 66c39dfc92f9d35ed9f713833156547842086891
> Author: Adrian Hunter <adrian.hunter@intel.com>
> Date:   Thu May 7 13:10:21 2015 +0300
> 
>     mmc: sdhci: Change to new way of doing re-tuning
>     
>     Make use of mmc core support for re-tuning instead
>     of doing it all in the sdhci driver.
>     
>     This patch also changes to flag the need for re-tuning
>     always after runtime suspend when tuning has been used
>     at initialization. Previously it was only done if
>     the re-tuning timer was in use.
>     
>     Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
>     Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
>
> commit b69587e2d5b09a192c45c604ea1f9e8d51f4c3a1
> Author: Adrian Hunter <adrian.hunter@intel.com>
> Date:   Fri Feb 6 14:13:01 2015 +0200
> 
>     mmc: sdhci-pci: Enable HS400 for some Intel host controllers
>     
>     Enable detection of HS400 support via capability bit-63
>     for some Intel host controllers.
>     
>     Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
>     Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
> 
> is responsible for the errors seen on this device. Reverting those 2
> allowed me to perform the installation without the controller timing
> out.
> 
> I'll try to pinpoint which one of the two is responsible for the
> timeout errors on this Surface 3.

After testing, both patches need to be reverted to get a stable eMMC on
the Surface 3. Where do we go from here?

Cheers