From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linuxfoundation.org ([140.211.169.12]:39664 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751642AbbJQWEd (ORCPT ); Sat, 17 Oct 2015 18:04:33 -0400 Subject: Patch "irqchip/gic-v3-its: Add missing cache flushes" has been added to the 4.1-stable tree To: marc.zyngier@arm.com, gregkh@linuxfoundation.org, jason@lakedaemon.net, p.fedin@samsung.com, stuart.yoder@freescale.com, tglx@linutronix.de Cc: , From: Date: Sat, 17 Oct 2015 15:04:30 -0700 Message-ID: <14451194707599@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: This is a note to let you know that I've just added the patch titled irqchip/gic-v3-its: Add missing cache flushes to the 4.1-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: irqchip-gic-v3-its-add-missing-cache-flushes.patch and it can be found in the queue-4.1 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >>From 5a9a8915c8888b615521b17d70a4342187eae60b Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Sun, 13 Sep 2015 12:14:32 +0100 Subject: irqchip/gic-v3-its: Add missing cache flushes From: Marc Zyngier commit 5a9a8915c8888b615521b17d70a4342187eae60b upstream. When the ITS is configured for non-cacheable transactions, make sure that the allocated, zeroed memory is flushed to the Point of Coherency, allowing the ITS to observe the zeros instead of random garbage (or even get its own data overwritten by zeros being evicted from the cache...). Fixes: 241a386c7dbb "irqchip: gicv3-its: Use non-cacheable accesses when no shareability" Reported-and-tested-by: Stuart Yoder Signed-off-by: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org Cc: Pavel Fedin Cc: Jason Cooper Link: http://lkml.kernel.org/r/1442142873-20213-3-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman --- drivers/irqchip/irq-gic-v3-its.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -921,8 +921,10 @@ retry_baser: * non-cacheable as well. */ shr = tmp & GITS_BASER_SHAREABILITY_MASK; - if (!shr) + if (!shr) { cache = GITS_BASER_nC; + __flush_dcache_area(base, alloc_size); + } goto retry_baser; } @@ -1163,6 +1165,8 @@ static struct its_device *its_create_dev return NULL; } + __flush_dcache_area(itt, sz); + dev->its = its; dev->itt = itt; dev->nr_ites = nr_ites; Patches currently in stable-queue which might be from marc.zyngier@arm.com are queue-4.1/arm-kvm-fix-incorrect-device-to-ipa-mapping.patch queue-4.1/irqchip-gic-v3-its-add-missing-cache-flushes.patch queue-4.1/arm-kvm-disable-virtual-timer-even-if-the-guest-is-not-using-it.patch queue-4.1/irqchip-atmel-aic5-use-per-chip-mask-caches-in-mask-unmask.patch