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diff for duplicates of <1445255774-32887-4-git-send-email-B48286@freescale.com>

diff --git a/a/content_digest b/N1/content_digest
index 219c4c6..92e456c 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,27 +2,27 @@
  "From\0Zhiqiang Hou <B48286@freescale.com>\0"
  "Subject\0[PATCH V5 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC\0"
  "Date\0Mon, 19 Oct 2015 19:56:12 +0800\0"
- "To\0<linux-arm-kernel@lists.infradead.org>"
-  <catalin.marinas@arm.com>
-  <will.deacon@arm.com>
-  <linux-i2c@vger.kernel.org>
-  <linux-watchdog@vger.kernel.org>
-  <linux-doc@vger.kernel.org>
- " <linux-clk@vger.kernel.org>\0"
- "Cc\0<mark.rutland@arm.com>"
-  <linux@roeck-us.net>
-  <wsa@the-dreams.de>
-  <wim@iguana.be>
-  <corbet@lwn.net>
-  <mturquette@baylibre.com>
-  <sboyd@codeaurora.org>
-  <Mingkai.Hu@freescale.com>
-  <Shaohui.Xie@freescale.com>
-  <scottwood@freescale.com>
-  <bhupesh.sharma@freescale.com>
-  <Wenbin.Song@freescale.com>
-  <B48286@freescale.com>
- " Li Yang <leoli@freescale.com>\0"
+ "To\0linux-arm-kernel@lists.infradead.org"
+  catalin.marinas@arm.com
+  will.deacon@arm.com
+  linux-i2c@vger.kernel.org
+  linux-watchdog@vger.kernel.org
+  linux-doc@vger.kernel.org
+ " linux-clk@vger.kernel.org\0"
+ "Cc\0mark.rutland@arm.com"
+  B48286@freescale.com
+  Shaohui.Xie@freescale.com
+  corbet@lwn.net
+  bhupesh.sharma@freescale.com
+  mturquette@baylibre.com
+  wsa@the-dreams.de
+  sboyd@codeaurora.org
+  wim@iguana.be
+  Wenbin.Song@freescale.com
+  scottwood@freescale.com
+  Mingkai.Hu@freescale.com
+  Li Yang <leoli@freescale.com>
+ " linux@roeck-us.net\0"
  "\00:1\0"
  "b\0"
  "From: Mingkai Hu <Mingkai.Hu@freescale.com>\n"
@@ -596,4 +596,4 @@
  "-- \n"
  2.1.0.27.g96db324
 
-d97a263c13942beb47548319647c1f05e50305b8e1c518e9c270511f27e5f586
+2e2515eb7bf00a6c401a2efbeb8b91485bf289d86311db4fa37b1d2dd40eadfb

diff --git a/a/1.txt b/N2/1.txt
index 4427db4..63b5eb3 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -103,28 +103,28 @@ index 0000000..bf5af82
 +		 *
 +		 * Currently supported enable-method is psci v0.2
 +		 */
-+		cpu0: cpu@0 {
++		cpu0: cpu at 0 {
 +			device_type = "cpu";
 +			compatible = "arm,cortex-a53";
 +			reg = <0x0 0x0>;
 +			clocks = <&clockgen 1 0>;
 +		};
 +
-+		cpu1: cpu@1 {
++		cpu1: cpu at 1 {
 +			device_type = "cpu";
 +			compatible = "arm,cortex-a53";
 +			reg = <0x0 0x1>;
 +			clocks = <&clockgen 1 0>;
 +		};
 +
-+		cpu2: cpu@2 {
++		cpu2: cpu at 2 {
 +			device_type = "cpu";
 +			compatible = "arm,cortex-a53";
 +			reg = <0x0 0x2>;
 +			clocks = <&clockgen 1 0>;
 +		};
 +
-+		cpu3: cpu@3 {
++		cpu3: cpu at 3 {
 +			device_type = "cpu";
 +			compatible = "arm,cortex-a53";
 +			reg = <0x0 0x3>;
@@ -132,7 +132,7 @@ index 0000000..bf5af82
 +		};
 +	};
 +
-+	memory@80000000 {
++	memory at 80000000 {
 +		device_type = "memory";
 +		reg = <0x0 0x80000000 0 0x80000000>;
 +		      /* DRAM space 1, size: 2GiB DRAM */
@@ -165,7 +165,7 @@ index 0000000..bf5af82
 +				     <&cpu3>;
 +	};
 +
-+	gic: interrupt-controller@1400000 {
++	gic: interrupt-controller at 1400000 {
 +		compatible = "arm,gic-400";
 +		#interrupt-cells = <3>;
 +		interrupt-controller;
@@ -182,31 +182,31 @@ index 0000000..bf5af82
 +		#size-cells = <2>;
 +		ranges;
 +
-+		clockgen: clocking@1ee1000 {
++		clockgen: clocking at 1ee1000 {
 +			compatible = "fsl,ls1043a-clockgen";
 +			reg = <0x0 0x1ee1000 0x0 0x1000>;
 +			#clock-cells = <2>;
 +			clocks = <&sysclk>;
 +		};
 +
-+		scfg: scfg@1570000 {
++		scfg: scfg at 1570000 {
 +			compatible = "fsl,ls1043a-scfg", "syscon";
 +			reg = <0x0 0x1570000 0x0 0x10000>;
 +			big-endian;
 +		};
 +
-+		dcfg: dcfg@1ee0000 {
++		dcfg: dcfg at 1ee0000 {
 +			compatible = "fsl,ls1043a-dcfg", "syscon";
 +			reg = <0x0 0x1ee0000 0x0 0x10000>;
 +		};
 +
-+		ifc: ifc@1530000 {
++		ifc: ifc at 1530000 {
 +			compatible = "fsl,ifc", "simple-bus";
 +			reg = <0x0 0x1530000 0x0 0x10000>;
 +			interrupts = <0 43 0x4>;
 +		};
 +
-+		esdhc: esdhc@1560000 {
++		esdhc: esdhc at 1560000 {
 +			compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
 +			reg = <0x0 0x1560000 0x0 0x10000>;
 +			interrupts = <0 62 0x4>;
@@ -217,7 +217,7 @@ index 0000000..bf5af82
 +			bus-width = <4>;
 +		};
 +
-+		dspi0: dspi@2100000 {
++		dspi0: dspi at 2100000 {
 +			compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
 +			#address-cells = <1>;
 +			#size-cells = <0>;
@@ -230,7 +230,7 @@ index 0000000..bf5af82
 +			status = "disabled";
 +		};
 +
-+		dspi1: dspi@2110000 {
++		dspi1: dspi at 2110000 {
 +			compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
 +			#address-cells = <1>;
 +			#size-cells = <0>;
@@ -243,7 +243,7 @@ index 0000000..bf5af82
 +			status = "disabled";
 +		};
 +
-+		i2c0: i2c@2180000 {
++		i2c0: i2c at 2180000 {
 +			compatible = "fsl,vf610-i2c";
 +			#address-cells = <1>;
 +			#size-cells = <0>;
@@ -257,7 +257,7 @@ index 0000000..bf5af82
 +			status = "disabled";
 +		};
 +
-+		i2c1: i2c@2190000 {
++		i2c1: i2c at 2190000 {
 +			compatible = "fsl,vf610-i2c";
 +			#address-cells = <1>;
 +			#size-cells = <0>;
@@ -268,7 +268,7 @@ index 0000000..bf5af82
 +			status = "disabled";
 +		};
 +
-+		i2c2: i2c@21a0000 {
++		i2c2: i2c at 21a0000 {
 +			compatible = "fsl,vf610-i2c";
 +			#address-cells = <1>;
 +			#size-cells = <0>;
@@ -279,7 +279,7 @@ index 0000000..bf5af82
 +			status = "disabled";
 +		};
 +
-+		i2c3: i2c@21b0000 {
++		i2c3: i2c at 21b0000 {
 +			compatible = "fsl,vf610-i2c";
 +			#address-cells = <1>;
 +			#size-cells = <0>;
@@ -290,35 +290,35 @@ index 0000000..bf5af82
 +			status = "disabled";
 +		};
 +
-+		duart0: serial@21c0500 {
++		duart0: serial at 21c0500 {
 +			compatible = "fsl,ns16550", "ns16550a";
 +			reg = <0x00 0x21c0500 0x0 0x100>;
 +			interrupts = <0 54 0x4>;
 +			clocks = <&clockgen 4 0>;
 +		};
 +
-+		duart1: serial@21c0600 {
++		duart1: serial at 21c0600 {
 +			compatible = "fsl,ns16550", "ns16550a";
 +			reg = <0x00 0x21c0600 0x0 0x100>;
 +			interrupts = <0 54 0x4>;
 +			clocks = <&clockgen 4 0>;
 +		};
 +
-+		duart2: serial@21d0500 {
++		duart2: serial at 21d0500 {
 +			compatible = "fsl,ns16550", "ns16550a";
 +			reg = <0x0 0x21d0500 0x0 0x100>;
 +			interrupts = <0 55 0x4>;
 +			clocks = <&clockgen 4 0>;
 +		};
 +
-+		duart3: serial@21d0600 {
++		duart3: serial at 21d0600 {
 +			compatible = "fsl,ns16550", "ns16550a";
 +			reg = <0x0 0x21d0600 0x0 0x100>;
 +			interrupts = <0 55 0x4>;
 +			clocks = <&clockgen 4 0>;
 +		};
 +
-+		gpio1: gpio@2300000 {
++		gpio1: gpio at 2300000 {
 +			compatible = "fsl,ls1043a-gpio";
 +			reg = <0x0 0x2300000 0x0 0x10000>;
 +			interrupts = <0 66 0x4>;
@@ -328,7 +328,7 @@ index 0000000..bf5af82
 +			#interrupt-cells = <2>;
 +		};
 +
-+		gpio2: gpio@2310000 {
++		gpio2: gpio at 2310000 {
 +			compatible = "fsl,ls1043a-gpio";
 +			reg = <0x0 0x2310000 0x0 0x10000>;
 +			interrupts = <0 67 0x4>;
@@ -338,7 +338,7 @@ index 0000000..bf5af82
 +			#interrupt-cells = <2>;
 +		};
 +
-+		gpio3: gpio@2320000 {
++		gpio3: gpio at 2320000 {
 +			compatible = "fsl,ls1043a-gpio";
 +			reg = <0x0 0x2320000 0x0 0x10000>;
 +			interrupts = <0 68 0x4>;
@@ -348,7 +348,7 @@ index 0000000..bf5af82
 +			#interrupt-cells = <2>;
 +		};
 +
-+		gpio4: gpio@2330000 {
++		gpio4: gpio at 2330000 {
 +			compatible = "fsl,ls1043a-gpio";
 +			reg = <0x0 0x2330000 0x0 0x10000>;
 +			interrupts = <0 134 0x4>;
@@ -358,7 +358,7 @@ index 0000000..bf5af82
 +			#interrupt-cells = <2>;
 +		};
 +
-+		lpuart0: serial@2950000 {
++		lpuart0: serial at 2950000 {
 +			compatible = "fsl,ls1021a-lpuart";
 +			reg = <0x0 0x2950000 0x0 0x1000>;
 +			interrupts = <0 48 0x4>;
@@ -367,7 +367,7 @@ index 0000000..bf5af82
 +			status = "disabled";
 +		};
 +
-+		lpuart1: serial@2960000 {
++		lpuart1: serial at 2960000 {
 +			compatible = "fsl,ls1021a-lpuart";
 +			reg = <0x0 0x2960000 0x0 0x1000>;
 +			interrupts = <0 49 0x4>;
@@ -376,7 +376,7 @@ index 0000000..bf5af82
 +			status = "disabled";
 +		};
 +
-+		lpuart2: serial@2970000 {
++		lpuart2: serial at 2970000 {
 +			compatible = "fsl,ls1021a-lpuart";
 +			reg = <0x0 0x2970000 0x0 0x1000>;
 +			interrupts = <0 50 0x4>;
@@ -385,7 +385,7 @@ index 0000000..bf5af82
 +			status = "disabled";
 +		};
 +
-+		lpuart3: serial@2980000 {
++		lpuart3: serial at 2980000 {
 +			compatible = "fsl,ls1021a-lpuart";
 +			reg = <0x0 0x2980000 0x0 0x1000>;
 +			interrupts = <0 51 0x4>;
@@ -394,7 +394,7 @@ index 0000000..bf5af82
 +			status = "disabled";
 +		};
 +
-+		lpuart4: serial@2990000 {
++		lpuart4: serial at 2990000 {
 +			compatible = "fsl,ls1021a-lpuart";
 +			reg = <0x0 0x2990000 0x0 0x1000>;
 +			interrupts = <0 52 0x4>;
@@ -403,7 +403,7 @@ index 0000000..bf5af82
 +			status = "disabled";
 +		};
 +
-+		lpuart5: serial@29a0000 {
++		lpuart5: serial at 29a0000 {
 +			compatible = "fsl,ls1021a-lpuart";
 +			reg = <0x0 0x29a0000 0x0 0x1000>;
 +			interrupts = <0 53 0x4>;
@@ -412,7 +412,7 @@ index 0000000..bf5af82
 +			status = "disabled";
 +		};
 +
-+		wdog0: wdog@2ad0000 {
++		wdog0: wdog at 2ad0000 {
 +			compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
 +			reg = <0x0 0x2ad0000 0x0 0x10000>;
 +			interrupts = <0 83 0x4>;
@@ -421,7 +421,7 @@ index 0000000..bf5af82
 +			big-endian;
 +		};
 +
-+		edma0: edma@2c00000 {
++		edma0: edma at 2c00000 {
 +			#dma-cells = <2>;
 +			compatible = "fsl,vf610-edma";
 +			reg = <0x0 0x2c00000 0x0 0x10000>,
@@ -437,35 +437,35 @@ index 0000000..bf5af82
 +				 <&clockgen 4 0>;
 +		};
 +
-+		usb0: usb3@2f00000 {
++		usb0: usb3 at 2f00000 {
 +			compatible = "snps,dwc3";
 +			reg = <0x0 0x2f00000 0x0 0x10000>;
 +			interrupts = <0 60 0x4>;
 +			dr_mode = "host";
 +		};
 +
-+		usb1: usb3@3000000 {
++		usb1: usb3 at 3000000 {
 +			compatible = "snps,dwc3";
 +			reg = <0x0 0x3000000 0x0 0x10000>;
 +			interrupts = <0 61 0x4>;
 +			dr_mode = "host";
 +		};
 +
-+		usb2: usb3@3100000 {
++		usb2: usb3 at 3100000 {
 +			compatible = "snps,dwc3";
 +			reg = <0x0 0x3100000 0x0 0x10000>;
 +			interrupts = <0 63 0x4>;
 +			dr_mode = "host";
 +		};
 +
-+		sata: sata@3200000 {
++		sata: sata at 3200000 {
 +			compatible = "fsl,ls1043a-ahci", "fsl,ls1021a-ahci";
 +			reg = <0x0 0x3200000 0x0 0x10000>;
 +			interrupts = <0 69 0x4>;
 +			clocks = <&clockgen 4 0>;
 +		};
 +
-+		msi1: msi-controller1@1571000 {
++		msi1: msi-controller1 at 1571000 {
 +			compatible = "fsl,1s1043a-msi";
 +			reg = <0x0 0x1571000 0x0 0x4>,
 +			      <0x0 0x1571004 0x0 0x4>;
@@ -474,7 +474,7 @@ index 0000000..bf5af82
 +			interrupts = <0 116 0x4>;
 +		};
 +
-+		msi2: msi-controller2@1572000 {
++		msi2: msi-controller2 at 1572000 {
 +			compatible = "fsl,1s1043a-msi";
 +			reg = <0x0 0x1572000 0x0 0x4>,
 +			      <0x0 0x1572004 0x0 0x4>;
@@ -483,7 +483,7 @@ index 0000000..bf5af82
 +			interrupts = <0 126 0x4>;
 +		};
 +
-+		msi3: msi-controller3@1573000 {
++		msi3: msi-controller3 at 1573000 {
 +			compatible = "fsl,1s1043a-msi";
 +			reg = <0x0 0x1573000 0x0 0x4>,
 +			      <0x0 0x1573004 0x0 0x4>;
@@ -492,7 +492,7 @@ index 0000000..bf5af82
 +			interrupts = <0 160 0x4>;
 +		};
 +
-+		pcie@3400000 {
++		pcie at 3400000 {
 +			compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
 +			reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */
 +			       0x40 0x00000000 0x0 0x00002000>; /* configuration space */
@@ -516,7 +516,7 @@ index 0000000..bf5af82
 +					<0000 0 0 4 &gic 0 113 0x4>;
 +		};
 +
-+		pcie@3500000 {
++		pcie at 3500000 {
 +			compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
 +			reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
 +			       0x48 0x00000000 0x0 0x00002000>; /* configuration space */
@@ -540,7 +540,7 @@ index 0000000..bf5af82
 +					<0000 0 0 4 &gic 0 123 0x4>;
 +		};
 +
-+		pcie@3600000 {
++		pcie at 3600000 {
 +			compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
 +			reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
 +			       0x50 0x00000000 0x0 0x00002000>; /* configuration space */
diff --git a/a/content_digest b/N2/content_digest
index 219c4c6..42ff20e 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,28 +1,8 @@
  "ref\01445255774-32887-1-git-send-email-B48286@freescale.com\0"
- "From\0Zhiqiang Hou <B48286@freescale.com>\0"
+ "From\0B48286@freescale.com (Zhiqiang Hou)\0"
  "Subject\0[PATCH V5 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC\0"
  "Date\0Mon, 19 Oct 2015 19:56:12 +0800\0"
- "To\0<linux-arm-kernel@lists.infradead.org>"
-  <catalin.marinas@arm.com>
-  <will.deacon@arm.com>
-  <linux-i2c@vger.kernel.org>
-  <linux-watchdog@vger.kernel.org>
-  <linux-doc@vger.kernel.org>
- " <linux-clk@vger.kernel.org>\0"
- "Cc\0<mark.rutland@arm.com>"
-  <linux@roeck-us.net>
-  <wsa@the-dreams.de>
-  <wim@iguana.be>
-  <corbet@lwn.net>
-  <mturquette@baylibre.com>
-  <sboyd@codeaurora.org>
-  <Mingkai.Hu@freescale.com>
-  <Shaohui.Xie@freescale.com>
-  <scottwood@freescale.com>
-  <bhupesh.sharma@freescale.com>
-  <Wenbin.Song@freescale.com>
-  <B48286@freescale.com>
- " Li Yang <leoli@freescale.com>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "From: Mingkai Hu <Mingkai.Hu@freescale.com>\n"
@@ -130,28 +110,28 @@
  "+\t\t *\n"
  "+\t\t * Currently supported enable-method is psci v0.2\n"
  "+\t\t */\n"
- "+\t\tcpu0: cpu@0 {\n"
+ "+\t\tcpu0: cpu at 0 {\n"
  "+\t\t\tdevice_type = \"cpu\";\n"
  "+\t\t\tcompatible = \"arm,cortex-a53\";\n"
  "+\t\t\treg = <0x0 0x0>;\n"
  "+\t\t\tclocks = <&clockgen 1 0>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tcpu1: cpu@1 {\n"
+ "+\t\tcpu1: cpu at 1 {\n"
  "+\t\t\tdevice_type = \"cpu\";\n"
  "+\t\t\tcompatible = \"arm,cortex-a53\";\n"
  "+\t\t\treg = <0x0 0x1>;\n"
  "+\t\t\tclocks = <&clockgen 1 0>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tcpu2: cpu@2 {\n"
+ "+\t\tcpu2: cpu at 2 {\n"
  "+\t\t\tdevice_type = \"cpu\";\n"
  "+\t\t\tcompatible = \"arm,cortex-a53\";\n"
  "+\t\t\treg = <0x0 0x2>;\n"
  "+\t\t\tclocks = <&clockgen 1 0>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tcpu3: cpu@3 {\n"
+ "+\t\tcpu3: cpu at 3 {\n"
  "+\t\t\tdevice_type = \"cpu\";\n"
  "+\t\t\tcompatible = \"arm,cortex-a53\";\n"
  "+\t\t\treg = <0x0 0x3>;\n"
@@ -159,7 +139,7 @@
  "+\t\t};\n"
  "+\t};\n"
  "+\n"
- "+\tmemory@80000000 {\n"
+ "+\tmemory at 80000000 {\n"
  "+\t\tdevice_type = \"memory\";\n"
  "+\t\treg = <0x0 0x80000000 0 0x80000000>;\n"
  "+\t\t      /* DRAM space 1, size: 2GiB DRAM */\n"
@@ -192,7 +172,7 @@
  "+\t\t\t\t     <&cpu3>;\n"
  "+\t};\n"
  "+\n"
- "+\tgic: interrupt-controller@1400000 {\n"
+ "+\tgic: interrupt-controller at 1400000 {\n"
  "+\t\tcompatible = \"arm,gic-400\";\n"
  "+\t\t#interrupt-cells = <3>;\n"
  "+\t\tinterrupt-controller;\n"
@@ -209,31 +189,31 @@
  "+\t\t#size-cells = <2>;\n"
  "+\t\tranges;\n"
  "+\n"
- "+\t\tclockgen: clocking@1ee1000 {\n"
+ "+\t\tclockgen: clocking at 1ee1000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-clockgen\";\n"
  "+\t\t\treg = <0x0 0x1ee1000 0x0 0x1000>;\n"
  "+\t\t\t#clock-cells = <2>;\n"
  "+\t\t\tclocks = <&sysclk>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tscfg: scfg@1570000 {\n"
+ "+\t\tscfg: scfg at 1570000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-scfg\", \"syscon\";\n"
  "+\t\t\treg = <0x0 0x1570000 0x0 0x10000>;\n"
  "+\t\t\tbig-endian;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tdcfg: dcfg@1ee0000 {\n"
+ "+\t\tdcfg: dcfg at 1ee0000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-dcfg\", \"syscon\";\n"
  "+\t\t\treg = <0x0 0x1ee0000 0x0 0x10000>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tifc: ifc@1530000 {\n"
+ "+\t\tifc: ifc at 1530000 {\n"
  "+\t\t\tcompatible = \"fsl,ifc\", \"simple-bus\";\n"
  "+\t\t\treg = <0x0 0x1530000 0x0 0x10000>;\n"
  "+\t\t\tinterrupts = <0 43 0x4>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tesdhc: esdhc@1560000 {\n"
+ "+\t\tesdhc: esdhc at 1560000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-esdhc\", \"fsl,esdhc\";\n"
  "+\t\t\treg = <0x0 0x1560000 0x0 0x10000>;\n"
  "+\t\t\tinterrupts = <0 62 0x4>;\n"
@@ -244,7 +224,7 @@
  "+\t\t\tbus-width = <4>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tdspi0: dspi@2100000 {\n"
+ "+\t\tdspi0: dspi at 2100000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-dspi\", \"fsl,ls1021a-v1.0-dspi\";\n"
  "+\t\t\t#address-cells = <1>;\n"
  "+\t\t\t#size-cells = <0>;\n"
@@ -257,7 +237,7 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tdspi1: dspi@2110000 {\n"
+ "+\t\tdspi1: dspi at 2110000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-dspi\", \"fsl,ls1021a-v1.0-dspi\";\n"
  "+\t\t\t#address-cells = <1>;\n"
  "+\t\t\t#size-cells = <0>;\n"
@@ -270,7 +250,7 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\ti2c0: i2c@2180000 {\n"
+ "+\t\ti2c0: i2c at 2180000 {\n"
  "+\t\t\tcompatible = \"fsl,vf610-i2c\";\n"
  "+\t\t\t#address-cells = <1>;\n"
  "+\t\t\t#size-cells = <0>;\n"
@@ -284,7 +264,7 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\ti2c1: i2c@2190000 {\n"
+ "+\t\ti2c1: i2c at 2190000 {\n"
  "+\t\t\tcompatible = \"fsl,vf610-i2c\";\n"
  "+\t\t\t#address-cells = <1>;\n"
  "+\t\t\t#size-cells = <0>;\n"
@@ -295,7 +275,7 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\ti2c2: i2c@21a0000 {\n"
+ "+\t\ti2c2: i2c at 21a0000 {\n"
  "+\t\t\tcompatible = \"fsl,vf610-i2c\";\n"
  "+\t\t\t#address-cells = <1>;\n"
  "+\t\t\t#size-cells = <0>;\n"
@@ -306,7 +286,7 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\ti2c3: i2c@21b0000 {\n"
+ "+\t\ti2c3: i2c at 21b0000 {\n"
  "+\t\t\tcompatible = \"fsl,vf610-i2c\";\n"
  "+\t\t\t#address-cells = <1>;\n"
  "+\t\t\t#size-cells = <0>;\n"
@@ -317,35 +297,35 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tduart0: serial@21c0500 {\n"
+ "+\t\tduart0: serial at 21c0500 {\n"
  "+\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n"
  "+\t\t\treg = <0x00 0x21c0500 0x0 0x100>;\n"
  "+\t\t\tinterrupts = <0 54 0x4>;\n"
  "+\t\t\tclocks = <&clockgen 4 0>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tduart1: serial@21c0600 {\n"
+ "+\t\tduart1: serial at 21c0600 {\n"
  "+\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n"
  "+\t\t\treg = <0x00 0x21c0600 0x0 0x100>;\n"
  "+\t\t\tinterrupts = <0 54 0x4>;\n"
  "+\t\t\tclocks = <&clockgen 4 0>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tduart2: serial@21d0500 {\n"
+ "+\t\tduart2: serial at 21d0500 {\n"
  "+\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n"
  "+\t\t\treg = <0x0 0x21d0500 0x0 0x100>;\n"
  "+\t\t\tinterrupts = <0 55 0x4>;\n"
  "+\t\t\tclocks = <&clockgen 4 0>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tduart3: serial@21d0600 {\n"
+ "+\t\tduart3: serial at 21d0600 {\n"
  "+\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n"
  "+\t\t\treg = <0x0 0x21d0600 0x0 0x100>;\n"
  "+\t\t\tinterrupts = <0 55 0x4>;\n"
  "+\t\t\tclocks = <&clockgen 4 0>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio1: gpio@2300000 {\n"
+ "+\t\tgpio1: gpio at 2300000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-gpio\";\n"
  "+\t\t\treg = <0x0 0x2300000 0x0 0x10000>;\n"
  "+\t\t\tinterrupts = <0 66 0x4>;\n"
@@ -355,7 +335,7 @@
  "+\t\t\t#interrupt-cells = <2>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio2: gpio@2310000 {\n"
+ "+\t\tgpio2: gpio at 2310000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-gpio\";\n"
  "+\t\t\treg = <0x0 0x2310000 0x0 0x10000>;\n"
  "+\t\t\tinterrupts = <0 67 0x4>;\n"
@@ -365,7 +345,7 @@
  "+\t\t\t#interrupt-cells = <2>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio3: gpio@2320000 {\n"
+ "+\t\tgpio3: gpio at 2320000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-gpio\";\n"
  "+\t\t\treg = <0x0 0x2320000 0x0 0x10000>;\n"
  "+\t\t\tinterrupts = <0 68 0x4>;\n"
@@ -375,7 +355,7 @@
  "+\t\t\t#interrupt-cells = <2>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio4: gpio@2330000 {\n"
+ "+\t\tgpio4: gpio at 2330000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-gpio\";\n"
  "+\t\t\treg = <0x0 0x2330000 0x0 0x10000>;\n"
  "+\t\t\tinterrupts = <0 134 0x4>;\n"
@@ -385,7 +365,7 @@
  "+\t\t\t#interrupt-cells = <2>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tlpuart0: serial@2950000 {\n"
+ "+\t\tlpuart0: serial at 2950000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n"
  "+\t\t\treg = <0x0 0x2950000 0x0 0x1000>;\n"
  "+\t\t\tinterrupts = <0 48 0x4>;\n"
@@ -394,7 +374,7 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tlpuart1: serial@2960000 {\n"
+ "+\t\tlpuart1: serial at 2960000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n"
  "+\t\t\treg = <0x0 0x2960000 0x0 0x1000>;\n"
  "+\t\t\tinterrupts = <0 49 0x4>;\n"
@@ -403,7 +383,7 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tlpuart2: serial@2970000 {\n"
+ "+\t\tlpuart2: serial at 2970000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n"
  "+\t\t\treg = <0x0 0x2970000 0x0 0x1000>;\n"
  "+\t\t\tinterrupts = <0 50 0x4>;\n"
@@ -412,7 +392,7 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tlpuart3: serial@2980000 {\n"
+ "+\t\tlpuart3: serial at 2980000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n"
  "+\t\t\treg = <0x0 0x2980000 0x0 0x1000>;\n"
  "+\t\t\tinterrupts = <0 51 0x4>;\n"
@@ -421,7 +401,7 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tlpuart4: serial@2990000 {\n"
+ "+\t\tlpuart4: serial at 2990000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n"
  "+\t\t\treg = <0x0 0x2990000 0x0 0x1000>;\n"
  "+\t\t\tinterrupts = <0 52 0x4>;\n"
@@ -430,7 +410,7 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tlpuart5: serial@29a0000 {\n"
+ "+\t\tlpuart5: serial at 29a0000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n"
  "+\t\t\treg = <0x0 0x29a0000 0x0 0x1000>;\n"
  "+\t\t\tinterrupts = <0 53 0x4>;\n"
@@ -439,7 +419,7 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\twdog0: wdog@2ad0000 {\n"
+ "+\t\twdog0: wdog at 2ad0000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-wdt\", \"fsl,imx21-wdt\";\n"
  "+\t\t\treg = <0x0 0x2ad0000 0x0 0x10000>;\n"
  "+\t\t\tinterrupts = <0 83 0x4>;\n"
@@ -448,7 +428,7 @@
  "+\t\t\tbig-endian;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tedma0: edma@2c00000 {\n"
+ "+\t\tedma0: edma at 2c00000 {\n"
  "+\t\t\t#dma-cells = <2>;\n"
  "+\t\t\tcompatible = \"fsl,vf610-edma\";\n"
  "+\t\t\treg = <0x0 0x2c00000 0x0 0x10000>,\n"
@@ -464,35 +444,35 @@
  "+\t\t\t\t <&clockgen 4 0>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tusb0: usb3@2f00000 {\n"
+ "+\t\tusb0: usb3 at 2f00000 {\n"
  "+\t\t\tcompatible = \"snps,dwc3\";\n"
  "+\t\t\treg = <0x0 0x2f00000 0x0 0x10000>;\n"
  "+\t\t\tinterrupts = <0 60 0x4>;\n"
  "+\t\t\tdr_mode = \"host\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tusb1: usb3@3000000 {\n"
+ "+\t\tusb1: usb3 at 3000000 {\n"
  "+\t\t\tcompatible = \"snps,dwc3\";\n"
  "+\t\t\treg = <0x0 0x3000000 0x0 0x10000>;\n"
  "+\t\t\tinterrupts = <0 61 0x4>;\n"
  "+\t\t\tdr_mode = \"host\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tusb2: usb3@3100000 {\n"
+ "+\t\tusb2: usb3 at 3100000 {\n"
  "+\t\t\tcompatible = \"snps,dwc3\";\n"
  "+\t\t\treg = <0x0 0x3100000 0x0 0x10000>;\n"
  "+\t\t\tinterrupts = <0 63 0x4>;\n"
  "+\t\t\tdr_mode = \"host\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tsata: sata@3200000 {\n"
+ "+\t\tsata: sata at 3200000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-ahci\", \"fsl,ls1021a-ahci\";\n"
  "+\t\t\treg = <0x0 0x3200000 0x0 0x10000>;\n"
  "+\t\t\tinterrupts = <0 69 0x4>;\n"
  "+\t\t\tclocks = <&clockgen 4 0>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tmsi1: msi-controller1@1571000 {\n"
+ "+\t\tmsi1: msi-controller1 at 1571000 {\n"
  "+\t\t\tcompatible = \"fsl,1s1043a-msi\";\n"
  "+\t\t\treg = <0x0 0x1571000 0x0 0x4>,\n"
  "+\t\t\t      <0x0 0x1571004 0x0 0x4>;\n"
@@ -501,7 +481,7 @@
  "+\t\t\tinterrupts = <0 116 0x4>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tmsi2: msi-controller2@1572000 {\n"
+ "+\t\tmsi2: msi-controller2 at 1572000 {\n"
  "+\t\t\tcompatible = \"fsl,1s1043a-msi\";\n"
  "+\t\t\treg = <0x0 0x1572000 0x0 0x4>,\n"
  "+\t\t\t      <0x0 0x1572004 0x0 0x4>;\n"
@@ -510,7 +490,7 @@
  "+\t\t\tinterrupts = <0 126 0x4>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tmsi3: msi-controller3@1573000 {\n"
+ "+\t\tmsi3: msi-controller3 at 1573000 {\n"
  "+\t\t\tcompatible = \"fsl,1s1043a-msi\";\n"
  "+\t\t\treg = <0x0 0x1573000 0x0 0x4>,\n"
  "+\t\t\t      <0x0 0x1573004 0x0 0x4>;\n"
@@ -519,7 +499,7 @@
  "+\t\t\tinterrupts = <0 160 0x4>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tpcie@3400000 {\n"
+ "+\t\tpcie at 3400000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-pcie\", \"snps,dw-pcie\";\n"
  "+\t\t\treg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */\n"
  "+\t\t\t       0x40 0x00000000 0x0 0x00002000>; /* configuration space */\n"
@@ -543,7 +523,7 @@
  "+\t\t\t\t\t<0000 0 0 4 &gic 0 113 0x4>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tpcie@3500000 {\n"
+ "+\t\tpcie at 3500000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-pcie\", \"snps,dw-pcie\";\n"
  "+\t\t\treg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */\n"
  "+\t\t\t       0x48 0x00000000 0x0 0x00002000>; /* configuration space */\n"
@@ -567,7 +547,7 @@
  "+\t\t\t\t\t<0000 0 0 4 &gic 0 123 0x4>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tpcie@3600000 {\n"
+ "+\t\tpcie at 3600000 {\n"
  "+\t\t\tcompatible = \"fsl,ls1043a-pcie\", \"snps,dw-pcie\";\n"
  "+\t\t\treg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */\n"
  "+\t\t\t       0x50 0x00000000 0x0 0x00002000>; /* configuration space */\n"
@@ -596,4 +576,4 @@
  "-- \n"
  2.1.0.27.g96db324
 
-d97a263c13942beb47548319647c1f05e50305b8e1c518e9c270511f27e5f586
+2541855be893bebabe8f1ef0fb2e3416dd195479481513fade1afbd0b56dac87

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