From: Michael Ellerman <mpe@ellerman.id.au>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, x86@kernel.org,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@kernel.org>, Jiri Olsa <jolsa@kernel.org>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Stephane Eranian <eranian@gmail.com>,
Russell King <linux@arm.linux.org.uk>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Subject: Re: [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr
Date: Tue, 10 Nov 2015 11:21:12 +1100 [thread overview]
Message-ID: <1447114872.13889.2.camel@ellerman.id.au> (raw)
In-Reply-To: <20151106102540.GR3604@twins.programming.kicks-ass.net>
On Fri, 2015-11-06 at 11:25 +0100, Peter Zijlstra wrote:
> On Fri, Nov 06, 2015 at 09:04:00PM +1100, Michael Ellerman wrote:
> > It's a perrenial request from our hardware PMU folks to be able to see the raw
> > values of the PMU registers.
> >
> > I think partly it's so that they can verify that perf is doing what they want,
> > and some of it is that they're interested in some of the more obscure info that
> > isn't plumbed out through other perf interfaces.
> >
> > We've used various internal hacks over the years to keep them happy. This is an
> > attempt to use a somewhat standard mechanism.
> >
> > It would also be helpful for those of us working on the perf hardware backends,
> > to be able to verify that we're programming things correctly, without resorting
> > to debug printks etc.
> >
> > Basically we want to sample regs at the time of the perf interrupt, so we
> > though PERF_SAMPLE_REGS_INTR made senes :)
> >
> > But if you think this is the wrong mechanism within perf, then please let us
> > know.
> >
> > I know perf's mission is to abstract as much of the arcane hardware details
> > into a generic interface and make PMUs actually useful for normal folks, and we
> > are committed to that, but it would also be useful to be able to get the raw
> > values for a different type of user.
> >
> > Maddy's patch only exports PMC1-6 and MMCR0/1. I think we also need to export
> > some others, in particular MMCRA has a lot of stuff in it, half of which is not
> > even architected. So that would have to be exported as "POWER8_MMCRA". And then
> > there's the SIAR/SDAR/SIER which contain a bunch of info on sampled
> > instructions that is not currently plumbed out.
>
> OK, no objections then. But this is useful information and should be
> included in the patch set.
Thanks, yeah definitely needs more explanation in the patch set.
cheers
WARNING: multiple messages have this Message-ID (diff)
From: mpe@ellerman.id.au (Michael Ellerman)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr
Date: Tue, 10 Nov 2015 11:21:12 +1100 [thread overview]
Message-ID: <1447114872.13889.2.camel@ellerman.id.au> (raw)
In-Reply-To: <20151106102540.GR3604@twins.programming.kicks-ass.net>
On Fri, 2015-11-06 at 11:25 +0100, Peter Zijlstra wrote:
> On Fri, Nov 06, 2015 at 09:04:00PM +1100, Michael Ellerman wrote:
> > It's a perrenial request from our hardware PMU folks to be able to see the raw
> > values of the PMU registers.
> >
> > I think partly it's so that they can verify that perf is doing what they want,
> > and some of it is that they're interested in some of the more obscure info that
> > isn't plumbed out through other perf interfaces.
> >
> > We've used various internal hacks over the years to keep them happy. This is an
> > attempt to use a somewhat standard mechanism.
> >
> > It would also be helpful for those of us working on the perf hardware backends,
> > to be able to verify that we're programming things correctly, without resorting
> > to debug printks etc.
> >
> > Basically we want to sample regs at the time of the perf interrupt, so we
> > though PERF_SAMPLE_REGS_INTR made senes :)
> >
> > But if you think this is the wrong mechanism within perf, then please let us
> > know.
> >
> > I know perf's mission is to abstract as much of the arcane hardware details
> > into a generic interface and make PMUs actually useful for normal folks, and we
> > are committed to that, but it would also be useful to be able to get the raw
> > values for a different type of user.
> >
> > Maddy's patch only exports PMC1-6 and MMCR0/1. I think we also need to export
> > some others, in particular MMCRA has a lot of stuff in it, half of which is not
> > even architected. So that would have to be exported as "POWER8_MMCRA". And then
> > there's the SIAR/SDAR/SIER which contain a bunch of info on sampled
> > instructions that is not currently plumbed out.
>
> OK, no objections then. But this is useful information and should be
> included in the patch set.
Thanks, yeah definitely needs more explanation in the patch set.
cheers
next prev parent reply other threads:[~2015-11-10 0:21 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-04 20:46 [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr Madhavan Srinivasan
2015-11-04 20:46 ` Madhavan Srinivasan
2015-11-04 20:46 ` [RFC PATCH 1/3] perf/core: extend perf_regs to include arch specific regs Madhavan Srinivasan
2015-11-04 20:46 ` Madhavan Srinivasan
2015-11-04 20:46 ` Madhavan Srinivasan
2015-11-04 20:46 ` [RFC PATCH 2/3]perf/powerpc: update macros and add regs to arch_misc_reg struct Madhavan Srinivasan
2015-11-04 20:46 ` Madhavan Srinivasan
2015-11-04 20:46 ` Madhavan Srinivasan
2015-11-04 20:46 ` [RFC PATCH 3/3]perf/powerpc: Functions to update arch_misc_regs Madhavan Srinivasan
2015-11-04 20:46 ` Madhavan Srinivasan
2015-11-05 13:07 ` [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr Peter Zijlstra
2015-11-05 13:07 ` Peter Zijlstra
2015-11-06 2:58 ` Sukadev Bhattiprolu
2015-11-06 2:58 ` Sukadev Bhattiprolu
2015-11-06 7:47 ` Madhavan Srinivasan
2015-11-06 7:47 ` Madhavan Srinivasan
2015-11-06 9:39 ` Michael Ellerman
2015-11-06 9:39 ` Michael Ellerman
2015-11-06 7:27 ` Madhavan Srinivasan
2015-11-06 7:27 ` Madhavan Srinivasan
2015-11-06 9:24 ` Peter Zijlstra
2015-11-06 9:24 ` Peter Zijlstra
2015-11-06 10:04 ` Michael Ellerman
2015-11-06 10:04 ` Michael Ellerman
2015-11-06 10:25 ` Peter Zijlstra
2015-11-06 10:25 ` Peter Zijlstra
2015-11-07 4:29 ` Madhavan Srinivasan
2015-11-07 4:29 ` Madhavan Srinivasan
2015-11-10 0:21 ` Michael Ellerman [this message]
2015-11-10 0:21 ` Michael Ellerman
2015-11-07 4:28 ` Madhavan Srinivasan
2015-11-07 4:28 ` Madhavan Srinivasan
2015-11-05 14:42 ` Stephane Eranian
2015-11-05 14:42 ` Stephane Eranian
2015-11-06 7:33 ` Madhavan Srinivasan
2015-11-06 7:33 ` Madhavan Srinivasan
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