From: Imre Deak <imre.deak@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
intel-gfx@lists.freedesktop.org,
Mika Kuoppala <mika.kuoppala@intel.com>
Subject: Re: [PATCH 01/10] drm/i915: fix the power well ID for always on wells
Date: Thu, 12 Nov 2015 15:57:06 +0200 [thread overview]
Message-ID: <1447336626.6396.39.camel@intel.com> (raw)
In-Reply-To: <20151112133915.GQ4437@intel.com>
On to, 2015-11-12 at 15:39 +0200, Ville Syrjälä wrote:
> On Wed, Nov 04, 2015 at 07:24:10PM +0200, Imre Deak wrote:
> > lookup_power_well() expects uniq power well IDs, but atm we have
> > uninitialized IDs which would clash with those power wells with a 0
> > ID. This wasn't a problem so far since nothing looked up such a
> > power
> > well, but an upcoming patch will (Misc IO for SKL), so fix this up
> > on
> > platforms where this matters.
>
> I thought we were moving the MISCIO and PW1 out from the power well
> framework? I think I'd rather do that than to fabricate stuff for
> .data.
That's a cleaner way yes, but imo we could do that refactoring as a
follow-up, thinking about the other users of lookup_power_well() at the
same time. This change makes sense in any case, since whenever you use
the lookup_power_well function you need to have unique IDs in place.
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 4 +++-
> > drivers/gpu/drm/i915/intel_runtime_pm.c | 2 ++
> > 2 files changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 72bbed2..c103f8d 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -621,7 +621,7 @@ enum punit_power_well {
> > PUNIT_POWER_WELL_DPIO_RX1 = 11,
> > PUNIT_POWER_WELL_DPIO_CMN_D = 12,
> >
> > - PUNIT_POWER_WELL_NUM,
> > + PUNIT_POWER_WELL_ALWAYS_ON,
> > };
> >
> > enum skl_disp_power_wells {
> > @@ -632,6 +632,8 @@ enum skl_disp_power_wells {
> > SKL_DISP_PW_DDI_D,
> > SKL_DISP_PW_1 = 14,
> > SKL_DISP_PW_2,
> > +
> > + SKL_DISP_PW_ALWAYS_ON,
> > };
> >
> > #define SKL_POWER_WELL_STATE(pw) (1 << ((pw) * 2))
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 3a989a7..fc5552c 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -1633,6 +1633,7 @@ static struct i915_power_well
> > vlv_power_wells[] = {
> > .always_on = 1,
> > .domains = VLV_ALWAYS_ON_POWER_DOMAINS,
> > .ops = &i9xx_always_on_power_well_ops,
> > + .data = PUNIT_POWER_WELL_ALWAYS_ON,
> > },
> > {
> > .name = "display",
> > @@ -1734,6 +1735,7 @@ static struct i915_power_well
> > skl_power_wells[] = {
> > .always_on = 1,
> > .domains = SKL_DISPLAY_ALWAYS_ON_POWER_DOMAINS,
> > .ops = &i9xx_always_on_power_well_ops,
> > + .data = SKL_DISP_PW_ALWAYS_ON,
> > },
> > {
> > .name = "power well 1",
> > --
> > 2.1.4
>
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next prev parent reply other threads:[~2015-11-12 13:57 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-04 17:24 [PATCH 00/10] drm/i915/skl: fix display core init/uninit sequence Imre Deak
2015-11-04 17:24 ` [PATCH 01/10] drm/i915: fix the power well ID for always on wells Imre Deak
2015-11-12 13:34 ` Patrik Jakobsson
2015-11-12 13:39 ` Ville Syrjälä
2015-11-12 13:57 ` Imre Deak [this message]
2015-11-04 17:24 ` [PATCH 02/10] drm/i915: fix lookup_power_well for power wells without any domain Imre Deak
2015-11-12 13:36 ` Patrik Jakobsson
2015-11-04 17:24 ` [PATCH 03/10] drm/i915: Make turning on/off PW1 and Misc I/O part of the init/fini sequences Imre Deak
2015-11-12 13:49 ` Patrik Jakobsson
2015-11-17 19:19 ` Imre Deak
2015-11-04 17:24 ` [PATCH 04/10] drm/i915: rename intel_power_domains_resume to *_sync_hw Imre Deak
2015-11-12 13:53 ` Patrik Jakobsson
2015-11-04 17:24 ` [PATCH 05/10] drm/i915/skl: init/uninit display core as part of the HW power domain state Imre Deak
2015-11-13 9:02 ` Patrik Jakobsson
2015-11-17 15:33 ` [PATCH v2 " Imre Deak
2015-11-04 17:24 ` [PATCH 06/10] drm/i915/skl: don't toggle PW1 and MISC power wells on-demand Imre Deak
2015-11-13 9:31 ` Patrik Jakobsson
2015-11-04 17:24 ` [PATCH 07/10] drm/i915/gen9: simplify DC toggling code Imre Deak
2015-11-13 9:48 ` Patrik Jakobsson
2015-11-04 17:24 ` [PATCH 08/10] drm/i915/skl: disable DC states before display core init/uninit Imre Deak
2015-11-13 9:52 ` Patrik Jakobsson
2015-11-04 17:24 ` [PATCH 09/10] drm/i915/skl: make sure LCPLL is disabled when uniniting CDCLK Imre Deak
2015-11-13 10:11 ` Patrik Jakobsson
2015-11-04 17:24 ` [PATCH 10/10] drm/i915/skl: remove redundant DDI/IRQ reinitialization during PW1 enabling Imre Deak
2015-11-13 11:00 ` Patrik Jakobsson
2015-11-17 19:34 ` [PATCH 00/10] drm/i915/skl: fix display core init/uninit sequence Imre Deak
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