From: Marcel Apfelbaum <marcel@redhat.com>
To: qemu-devel@nongnu.org
Cc: ehabkost@redhat.com, mst@redhat.com, kraxel@redhat.com,
pbonzini@redhat.com, marcel@redhat.com, imammedo@redhat.com,
rth@twiddle.net
Subject: [Qemu-devel] [PATCH V2 1/4] hw/pxb: remove the built-in pci bridge
Date: Sun, 15 Nov 2015 17:39:03 +0200 [thread overview]
Message-ID: <1447601946-31248-2-git-send-email-marcel@redhat.com> (raw)
In-Reply-To: <1447601946-31248-1-git-send-email-marcel@redhat.com>
As part of porting the pxb device to Q35 remove the internal pci-2-pci
bridge. The only way to hot-pug devices on the extra PCI root buses
is by adding a pci-2-pci to the pxb before the firmware assign the
IO/mem resources.
Keep the internal bridge for existing machines.
Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
---
hw/pci-bridge/pci_expander_bridge.c | 27 +++++++++++++++++++--------
include/hw/compat.h | 4 ++++
2 files changed, 23 insertions(+), 8 deletions(-)
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index 57f8a37..541414c 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -34,6 +34,9 @@ typedef struct PXBBus {
#define TYPE_PXB_DEVICE "pxb"
#define PXB_DEV(obj) OBJECT_CHECK(PXBDev, (obj), TYPE_PXB_DEVICE)
+#define PXB_FLAG_ENABLE_BRIDGE_BIT 0
+#define PXB_FLAG_ENABLE_BRIDGE (1 << PXB_FLAG_ENABLE_BRIDGE_BIT)
+
typedef struct PXBDev {
/*< private >*/
PCIDevice parent_obj;
@@ -41,6 +44,7 @@ typedef struct PXBDev {
uint8_t bus_nr;
uint16_t numa_node;
+ uint32_t flags;
} PXBDev;
static GList *pxb_dev_list;
@@ -196,7 +200,7 @@ static gint pxb_compare(gconstpointer a, gconstpointer b)
static int pxb_dev_initfn(PCIDevice *dev)
{
PXBDev *pxb = PXB_DEV(dev);
- DeviceState *ds, *bds;
+ DeviceState *ds, *bds = NULL;
PCIBus *bus;
const char *dev_name = NULL;
@@ -211,18 +215,21 @@ static int pxb_dev_initfn(PCIDevice *dev)
}
ds = qdev_create(NULL, TYPE_PXB_HOST);
- bus = pci_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
+ if (pxb->flags & PXB_FLAG_ENABLE_BRIDGE) {
+ bus = pci_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
+ bds = qdev_create(BUS(bus), "pci-bridge");
+ bds->id = dev_name;
+ qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr);
+ qdev_prop_set_bit(bds, PCI_BRIDGE_DEV_PROP_SHPC, false);
+ } else {
+ bus = pci_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_BUS);
+ }
bus->parent_dev = dev;
bus->address_space_mem = dev->bus->address_space_mem;
bus->address_space_io = dev->bus->address_space_io;
bus->map_irq = pxb_map_irq_fn;
- bds = qdev_create(BUS(bus), "pci-bridge");
- bds->id = dev_name;
- qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr);
- qdev_prop_set_bit(bds, PCI_BRIDGE_DEV_PROP_SHPC, false);
-
PCI_HOST_BRIDGE(ds)->bus = bus;
if (pxb_register_bus(dev, bus)) {
@@ -230,7 +237,9 @@ static int pxb_dev_initfn(PCIDevice *dev)
}
qdev_init_nofail(ds);
- qdev_init_nofail(bds);
+ if (bds) {
+ qdev_init_nofail(bds);
+ }
pci_word_test_and_set_mask(dev->config + PCI_STATUS,
PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
@@ -251,6 +260,8 @@ static Property pxb_dev_properties[] = {
/* Note: 0 is not a legal a PXB bus number. */
DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0),
DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED),
+ DEFINE_PROP_BIT("x-enable-internal-bridge", PXBDev, flags,
+ PXB_FLAG_ENABLE_BRIDGE_BIT, false),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/include/hw/compat.h b/include/hw/compat.h
index 97feb75..cbf65ee 100644
--- a/include/hw/compat.h
+++ b/include/hw/compat.h
@@ -10,6 +10,10 @@
.driver = "virtio-pci",\
.property = "disable-pcie",\
.value = "on",\
+ },{\
+ .driver = "pxb",\
+ .property = "x-enable-internal-bridge",\
+ .value = "on",\
},
#define HW_COMPAT_2_3 \
--
2.1.0
next prev parent reply other threads:[~2015-11-15 15:39 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-15 15:39 [Qemu-devel] [PATCH V2 0/4] hw/pcie: Multi-root support for Q35 Marcel Apfelbaum
2015-11-15 15:39 ` Marcel Apfelbaum [this message]
2015-11-15 15:39 ` [Qemu-devel] [PATCH V2 2/4] hw/acpi: merge pxb adjacent memory/IO ranges Marcel Apfelbaum
2015-11-15 15:39 ` [Qemu-devel] [PATCH V2 3/4] hw/pc: query both q35 and i440fx bus Marcel Apfelbaum
2015-11-16 18:26 ` Eduardo Habkost
2015-11-17 10:29 ` Marcel Apfelbaum
2015-11-15 15:39 ` [Qemu-devel] [PATCH V2 4/4] hw/pxb: add support for PCIe Marcel Apfelbaum
2015-11-16 8:40 ` [Qemu-devel] [PATCH V2 0/4] hw/pcie: Multi-root support for Q35 Paolo Bonzini
2015-11-16 9:52 ` Marcel Apfelbaum
2015-11-16 9:56 ` Paolo Bonzini
2015-11-16 10:02 ` Marcel Apfelbaum
2015-11-16 10:03 ` Paolo Bonzini
2015-11-16 10:10 ` Marcel Apfelbaum
2015-11-16 10:11 ` Paolo Bonzini
2015-11-16 10:34 ` Marcel Apfelbaum
2015-11-16 10:37 ` Michael S. Tsirkin
2015-11-16 10:39 ` Marcel Apfelbaum
2015-11-16 10:59 ` Michael S. Tsirkin
2015-11-16 11:37 ` Marcel Apfelbaum
2015-11-16 13:30 ` Paolo Bonzini
2015-11-19 15:05 ` Laine Stump
2015-11-17 8:15 ` Markus Armbruster
2015-11-17 10:42 ` Marcel Apfelbaum
2015-11-17 12:26 ` Markus Armbruster
2015-11-17 13:49 ` Marcel Apfelbaum
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