[U-Boot] [PATCH] sunxi: Set AHB1 clock to PLL6/3 on all clock_sun6i.h using SoCs

[Ian Campbell <ijc+uboot@hellion.org.uk>]

On Mon, 2015-11-23 at 14:47 +0800, Chen-Yu Tsai wrote:
> Hi,
> 
> On Sun, Nov 22, 2015 at 11:40 PM, Hans de Goede <hdegoede@redhat.com>
> wrote:
> > Hi,
> >
> > On 22-11-15 15:14, Chen-Yu Tsai wrote:
> >>
> >> On Sat, Nov 21, 2015 at 11:48 PM, Ian Campbell <
> ijc+uboot at hellion.org.uk>
> >> wrote:
> >>>
> >>> On Fri, 2015-11-20 at 19:32 +0100, Hans de Goede wrote:
> >>>>
> >>>> According to the datasheets the max speed of AHB1 is 276 MHz, so
> >>>> setting it to PLL6 / 3 which gives us 200MHz everywhere is fine,
> >>>> and gives us a nice speed-up in certain workloads.
> >>>>
> >>>> Suggested-by: Chen-Yu Tsai <wens@csie.org>
> >>>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> >>>
> >>>
> >>> I suppose you've tested this on at least one such board? In that
> case:
> >>> Acked-by: Ian Campbell <ijc@hellion.org.uk>
> >>
> >>
> >> I've tested this on some of my boards. It works fine on my
> Hummingbird A31
> >> and A23 Q8 tablet. However my Sinlinx SinA33 is giving me kernel
> Oops
> >> which
> >> I haven't looked into yet.
> >
> >
> > Works for me on a q8 A33 tablet. But lets investigate your oops
> before
> > including
> > this in the next pull-req. Thanks for the testing!
> 
> I retested it with a proper clean build, and it works now. No idea
> what
> the oops was about.
> 
> Also tested on my Sinlinx SinA31s. So it now works on all my sun6i
> generation
> boards.
> 
> Tested-by: Chen-Yu Tsai <wens@csie.org>

Good enough for me, my original Ack stands...

>