From: Imre Deak <imre.deak@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Flush the RPS bottom-half when the GPU idles
Date: Wed, 09 Dec 2015 19:47:29 +0200 [thread overview]
Message-ID: <1449683249.11719.15.camel@intel.com> (raw)
In-Reply-To: <1449681017-16722-1-git-send-email-chris@chris-wilson.co.uk>
On ke, 2015-12-09 at 17:10 +0000, Chris Wilson wrote:
> Make sure that the RPS bottom-half is flushed before we set the idle
> frequency when we decide the GPU is idle. This should prevent any
> races
> with the bottom-half and setting the idle frequency, and ensures that
> the bottom-half is bounded by the GPU's rpm reference taken for when
> it
> is active (i.e. between gen6_rps_busy() and gen6_rps_idle()).
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index e655321385e2..bb796d4e9a3a 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4401,11 +4401,15 @@ void gen6_rps_busy(struct drm_i915_private
> *dev_priv)
>
> void gen6_rps_idle(struct drm_i915_private *dev_priv)
> {
> - struct drm_device *dev = dev_priv->dev;
> + /* Flush our bottom-half so that it does not race with us
> + * setting the idle frequency and so that it is bounded by
> + * our rpm wakeref.
> + */
> + flush_work(&dev_priv->rps.work);
A (spurious) RPS interrupt could still reschedule the work, so could we
also explicitly disable the interrupts? Meaning to use
gen6_{disable,enable}_rps_interrupts() in gen6_rps_{idle,busy} and
making sure vlv_set_rps_idle(), gen6_set_rps() would not re-enable the
interrupts.
That would also make it possible to
remove gen6_{disable,enable}_rps_interrupts() from the
suspend/resume path.
> mutex_lock(&dev_priv->rps.hw_lock);
> if (dev_priv->rps.enabled) {
> - if (IS_VALLEYVIEW(dev))
> + if (IS_VALLEYVIEW(dev_priv))
> vlv_set_rps_idle(dev_priv);
> else
> gen6_set_rps(dev_priv->dev, dev_priv-
> >rps.idle_freq);
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-12-09 17:47 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-09 17:10 [PATCH] drm/i915: Flush the RPS bottom-half when the GPU idles Chris Wilson
2015-12-09 17:30 ` Jesse Barnes
2015-12-10 12:25 ` Chris Wilson
2015-12-09 17:47 ` Imre Deak [this message]
2015-12-09 20:52 ` Chris Wilson
2015-12-09 22:02 ` Imre Deak
2015-12-10 11:37 ` Chris Wilson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1449683249.11719.15.camel@intel.com \
--to=imre.deak@intel.com \
--cc=chris@chris-wilson.co.uk \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.