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From: Chin Liang See <clsee@altera.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 6/6] arm: socfpga: Add support for Denali NAND controller
Date: Tue, 22 Dec 2015 23:17:23 +0800	[thread overview]
Message-ID: <1450797443.2631.3.camel@altera.com> (raw)
In-Reply-To: <1450580446-6435-6-git-send-email-marex@denx.de>

On Sun, 2015-12-20 at 04:00 +0100, Marek Vasut wrote:
> Add common configuration bits for the Denali NAND controller and also
> support for using it as a boot device in SPL.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Chin Liang See <clsee@altera.com>
> ---
>  include/configs/socfpga_common.h | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/include/configs/socfpga_common.h
> b/include/configs/socfpga_common.h
> index 4124d8b..8886ccf 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -162,6 +162,19 @@
>  #endif
>  
>  /*
> + * NAND Support
> + */
> +#ifdef CONFIG_NAND_DENALI
> +#define CONFIG_SYS_MAX_NAND_DEVICE	1
> +#define CONFIG_SYS_NAND_MAX_CHIPS	1
> +#define CONFIG_SYS_NAND_ONFI_DETECTION
> +#define CONFIG_NAND_DENALI_ECC_SIZE	512
> +#define CONFIG_SYS_NAND_REGS_BASE	0xffb80000
> +#define CONFIG_SYS_NAND_DATA_BASE	0xff900000

You can use SOCFPGA_NANDDATA_ADDRESS and SOCFPGA_NANDREGS_ADDRESS

> +#define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_NAND_DATA_BA
> SE + 0x10)
> +#endif
> +
> +/*
>   * I2C support
>   */
>  #define CONFIG_SYS_I2C
> @@ -302,6 +315,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>  #ifdef CONFIG_DM_SPI
>  #define CONFIG_SPL_SPI_SUPPORT
>  #endif
> +#ifdef CONFIG_SPL_NAND_DENALI
> +#define CONFIG_SPL_NAND_SUPPORT
> +#endif
>  
>  /* SPL SDMMC boot support */
>  #ifdef CONFIG_SPL_MMC_SUPPORT
> @@ -324,6 +340,13 @@ unsigned int
> cm_get_qspi_controller_clk_hz(void);
>  #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x40000
>  #endif
>  
> +/* SPL NAND boot support */
> +#ifdef CONFIG_SPL_NAND_SUPPORT
> +#define CONFIG_SYS_NAND_USE_FLASH_BBT
> +#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0

I believe this is need for U-Boot too, right?

Thanks
Chin Liang

> +#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
> +#endif
> +
>  /*
>   * Stack setup
>   */

  reply	other threads:[~2015-12-22 15:17 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-20  3:00 [U-Boot] [PATCH 1/6] arm: socfpga: Define NAND reset bit Marek Vasut
2015-12-20  3:00 ` [U-Boot] [PATCH 2/6] arm: socfpga: Unreset NAND in SPL Marek Vasut
2015-12-20  3:00 ` [U-Boot] [PATCH 3/6] arm: socfpga: Unreset NAND in U-Boot Marek Vasut
2015-12-22 15:36   ` Chin Liang See
2015-12-20  3:00 ` [U-Boot] [PATCH 4/6] arm: socfpga: Enable SPL MMC/SPI support only if DM_MMC/SPI is enabled Marek Vasut
2015-12-22 15:40   ` Chin Liang See
2015-12-20  3:00 ` [U-Boot] [PATCH 5/6] arm: socfpga: Enable DFU MMC support only if DM_MMC " Marek Vasut
2015-12-22 15:19   ` Chin Liang See
2015-12-20  3:00 ` [U-Boot] [PATCH 6/6] arm: socfpga: Add support for Denali NAND controller Marek Vasut
2015-12-22 15:17   ` Chin Liang See [this message]
2015-12-22 15:51     ` Marek Vasut
2015-12-22 20:23     ` Marek Vasut
2015-12-23  0:26       ` Chin Liang See

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