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Message-ID: <1452277557.19330.64.camel@hpe.com>
Subject: Re: [PATCH] x86: Micro-optimise clflush_cache_range()
From: Toshi Kani <toshi.kani@hpe.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, x86@kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>,
        "H. Peter Anvin" <hpa@zytor.com>, Borislav Petkov <bp@suse.de>,
        "Luis R. Rodriguez" <mcgrof@suse.com>,
        Stephen Rothwell <sfr@canb.auug.org.au>,
        Ross Zwisler <ross.zwisler@linux.intel.com>,
        Sai Praneeth <sai.praneeth.prakhya@intel.com>,
        linux-kernel@vger.kernel.org
Date: Fri, 08 Jan 2016 11:25:57 -0700
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On Fri, 2016-01-08 at 09:55 +0000, Chris Wilson wrote:
> Whilst inspecting the asm for clflush_cache_range() and some perf
> profiles
> that required extensive flushing of single cachelines (from part of the
> intel-gpu-tools GPU benchmarks), we noticed that gcc was reloading
> boot_cpu_data.x86_clflush_size on every iteration of the loop. We can
> manually hoist that read which perf regarded as taking ~25% of the
> function time for a single cacheline flush.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: "H. Peter Anvin" <hpa@zytor.com>
> Cc: x86@kernel.org
> Cc: Toshi Kani <toshi.kani@hpe.com>
> Cc: Borislav Petkov <bp@suse.de>
> Cc: "Luis R. Rodriguez" <mcgrof@suse.com>
> Cc: Stephen Rothwell <sfr@canb.auug.org.au>
> Cc: Ross Zwisler <ross.zwisler@linux.intel.com>
> Cc: Sai Praneeth <sai.praneeth.prakhya@intel.com>
> Cc: linux-kernel@vger.kernel.org
> Acked-by: "H. Peter Anvin" <hpa@zytor.com>

Thanks for the improvement!  The change looks good to me.

Reviewed-by: Toshi Kani <toshi.kani@hpe.com>

-Toshi