From mboxrd@z Thu Jan 1 00:00:00 1970 From: joe@perches.com (Joe Perches) Date: Mon, 11 Jan 2016 23:11:23 -0800 Subject: [PATCH] arm: irq: l2c: do not print error in case of missing l2c from dtb In-Reply-To: <1452580473-10073-1-git-send-email-andi.shyti@samsung.com> References: <1452580473-10073-1-git-send-email-andi.shyti@samsung.com> Message-ID: <1452582683.7773.102.camel@perches.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, 2016-01-12 at 15:34 +0900, Andi Shyti wrote: > In some architectures the L2 cache controller is integrated in the > processor's block itself and it doesn't use any external cache > controller. This means that an entry in the board's dtb related > to the l2c is not necessary. > > Distinguish between error codes and print just an information in > case of -ENODEV. trivia: > diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c [] > @@ -95,7 +95,9 @@ void __init init_IRQ(void) > ? outer_cache.write_sec = machine_desc->l2c_write_sec; > ? ret = l2x0_of_init(machine_desc->l2c_aux_val, > ? ???machine_desc->l2c_aux_mask); > - if (ret) > + if (ret == -ENODEV) > + pr_info("no L2C controller entry found in the dtb\n"); Perhaps this would be more consistent if it was pr_info("L2C: no controller entry found in the dtb\n"); > > + else if (ret) > ? pr_err("L2C: failed to init: %d\n", ret); > ? } > ? From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1761144AbcALHL3 (ORCPT ); Tue, 12 Jan 2016 02:11:29 -0500 Received: from smtprelay0003.hostedemail.com ([216.40.44.3]:34529 "EHLO smtprelay.hostedemail.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751156AbcALHL2 (ORCPT ); Tue, 12 Jan 2016 02:11:28 -0500 X-Session-Marker: 6A6F6540706572636865732E636F6D X-Spam-Summary: 2,0,0,,d41d8cd98f00b204,joe@perches.com,:::::::::::::::::::::::::::,RULES_HIT:41:355:379:541:599:973:988:989:1260:1277:1311:1313:1314:1345:1359:1373:1437:1515:1516:1518:1534:1540:1593:1594:1711:1730:1747:1777:1792:2393:2559:2562:2828:2892:3138:3139:3140:3141:3142:3352:3622:3865:3866:3867:3868:3870:3871:3872:3874:4321:5007:6119:6261:6742:7903:10004:10400:10848:11232:11658:11783:11914:12043:12517:12519:12740:13069:13311:13357:13894:14659:21080,0,RBL:none,CacheIP:none,Bayesian:0.5,0.5,0.5,Netcheck:none,DomainCache:0,MSF:not bulk,SPF:fn,MSBL:0,DNSBL:none,Custom_rules:0:0:0,LFtime:1,LUA_SUMMARY:none X-HE-Tag: doll62_63a540b108040 X-Filterd-Recvd-Size: 2057 Message-ID: <1452582683.7773.102.camel@perches.com> Subject: Re: [PATCH] arm: irq: l2c: do not print error in case of missing l2c from dtb From: Joe Perches To: Andi Shyti , linux-arm-kernel@lists.infradead.org Cc: linux@arm.linux.org.uk, tony@atomide.com, robh@kernel.org, tglx@linutronix.de, olof@lixom.net, tomasz.figa@gmail.com, jiang.liu@linux.intel.com, yamada.masahiro@socionext.com, linux-kernel@vger.kernel.org, k.kozlowski@samsung.com, m.szyprowski@samsung.com, andi@etezian.org Date: Mon, 11 Jan 2016 23:11:23 -0800 In-Reply-To: <1452580473-10073-1-git-send-email-andi.shyti@samsung.com> References: <1452580473-10073-1-git-send-email-andi.shyti@samsung.com> Content-Type: text/plain; charset="ISO-8859-1" X-Mailer: Evolution 3.18.3-1ubuntu1 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2016-01-12 at 15:34 +0900, Andi Shyti wrote: > In some architectures the L2 cache controller is integrated in the > processor's block itself and it doesn't use any external cache > controller. This means that an entry in the board's dtb related > to the l2c is not necessary. > > Distinguish between error codes and print just an information in > case of -ENODEV. trivia: > diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c [] > @@ -95,7 +95,9 @@ void __init init_IRQ(void) >   outer_cache.write_sec = machine_desc->l2c_write_sec; >   ret = l2x0_of_init(machine_desc->l2c_aux_val, >      machine_desc->l2c_aux_mask); > - if (ret) > + if (ret == -ENODEV) > + pr_info("no L2C controller entry found in the dtb\n"); Perhaps this would be more consistent if it was pr_info("L2C: no controller entry found in the dtb\n"); > > + else if (ret) >   pr_err("L2C: failed to init: %d\n", ret); >   } >