Re: [BXT DSI timing fixes v1 3/3] drm/i915/bxt: Fixed dsi enc disable and blank at bootup

[Mika Kahola <mika.kahola@intel.com>]

I applied this patch for testing BXT-M I received this error message

[   16.276906] Hardware name: Intel Corp. Broxton M/RVP, BIOS
BXTM_IFWI_X64_R_2015_49_2_03 11/25/2015
[   16.286793] task: ffff8801795a2640 ti: ffff880178300000 task.ti:
ffff880178300000
[   16.295047] RIP: 0010:[<ffffffffa01154e3>]  [<ffffffffa01154e3>]
skl_update_pipe_wm+0xc3/0x870 [i915]
[   16.305284] RSP: 0018:ffff8801783036c0  EFLAGS: 00010246
[   16.311143] RAX: 0000000000000000 RBX: ffff880178317000 RCX:
0000000000000000
[   16.319013] RDX: 0000000000000000 RSI: ffff880178317760 RDI:
ffff880179660000
[   16.326882] RBP: ffff880178303760 R08: ffff88017966b8ec R09:
ffff880178317000
[   16.334754] R10: 00000000000001fc R11: 0000000000000000 R12:
ffff880178286000
[   16.342624] R13: ffff880178286000 R14: ffff88007af90800 R15:
ffff880179660000
[   16.350496] FS:  00007f2f0d3a1880(0000) GS:ffff88017fd00000(0000)
knlGS:0000000000000000
[   16.359421] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[   16.365758] CR2: 00007fa7544dd020 CR3: 00000001782df000 CR4:
00000000003406e0
[   16.373629] Stack:
[   16.375842]  0000000000000006 ffff880178286000 ffffffff818996ae
0000000000000005
[   16.384013]  ffff8801795a2640 0000000000000007 0000000000000006
0000000000000002
[   16.392201]  ffff88007af90b08 ffff88017966b8ec 0000000000000000
ffffffff8189967b
[   16.400379] Call Trace:
[   16.403083]  [<ffffffff818996ae>] ? mutex_unlock+0xe/0x10
[   16.409042]  [<ffffffff8189967b>] ? __mutex_unlock_slowpath
+0x11b/0x140
[   16.416382]  [<ffffffffa01160ef>] skl_update_wm+0x16f/0x690 [i915]
[   16.423201]  [<ffffffff818996ae>] ? mutex_unlock+0xe/0x10
[   16.429216]  [<ffffffffa018d540>] ? intel_fbc_disable_crtc+0xa0/0xb0
[i915]
[   16.436943]  [<ffffffffa01176ae>] intel_update_watermarks+0x1e/0x30
[i915]
[   16.444583]  [<ffffffffa017e4ea>] intel_crtc_disable_noatomic
+0xca/0x140 [i915]
[   16.452703]  [<ffffffffa0187e07>] intel_modeset_setup_hw_state
+0xe27/0xe30 [i915]
[   16.461015]  [<ffffffffa018a935>] intel_modeset_init+0x1575/0x1920
[i915]
[   16.468569]  [<ffffffffa01c1dc3>] i915_driver_load+0x1283/0x15e0
[i915]
[   16.475894]  [<ffffffffa006d34f>] drm_dev_register+0x6f/0xb0 [drm]
[   16.482731]  [<ffffffffa006f96a>] drm_get_pci_dev+0x10a/0x1d0 [drm]
[   16.489648]  [<ffffffff8189ba11>] ? _raw_spin_unlock_irqrestore
+0x51/0x70
[   16.497177]  [<ffffffffa0103259>] i915_pci_probe+0x49/0x50 [i915]
[   16.503907]  [<ffffffff814388d0>] pci_device_probe+0x80/0xf0
[   16.510156]  [<ffffffff8150def8>] driver_probe_device+0x168/0x3d0
[   16.516881]  [<ffffffff8150e1c6>] __driver_attach+0x66/0x90
[   16.523030]  [<ffffffff8150e160>] ? driver_probe_device+0x3d0/0x3d0
[   16.529946]  [<ffffffff8150bc9b>] bus_for_each_dev+0x5b/0xa0
[   16.536190]  [<ffffffff8150d8ce>] driver_attach+0x1e/0x20
[   16.542146]  [<ffffffff8150d2b1>] bus_add_driver+0x151/0x270
[   16.548389]  [<ffffffff8150ed7c>] driver_register+0x8c/0xd0
[   16.554540]  [<ffffffff81436f60>] __pci_register_driver+0x60/0x70
[   16.561276]  [<ffffffffa006fa88>] drm_pci_init+0x58/0xf0 [drm]
[   16.567714]  [<ffffffff810cd1fd>] ? trace_hardirqs_on+0xd/0x10
[   16.574149]  [<ffffffffa0237000>] ? 0xffffffffa0237000
[   16.579855]  [<ffffffffa0237094>] i915_init+0x94/0x9b [i915]
[   16.586101]  [<ffffffff81000436>] do_one_initcall+0x106/0x1d0
[   16.592445]  [<ffffffff810e937e>] ? rcu_read_lock_sched_held
+0x6e/0xa0
[   16.599647]  [<ffffffff811da001>] ? kmem_cache_alloc_trace
+0x1c1/0x230
[   16.606853]  [<ffffffff8118c25d>] do_init_module+0x60/0x1ea
[   16.613003]  [<ffffffff81110760>] load_module+0x1df0/0x25a0
[   16.619151]  [<ffffffff8110c880>] ? store_uevent+0x40/0x40
[   16.625201]  [<ffffffff8110d065>] ? copy_module_from_fd.isra.38
+0xa5/0x140
[   16.632787]  [<ffffffff811110ff>] SyS_finit_module+0x8f/0xa0
[   16.639030]  [<ffffffff8189c29b>] entry_SYSCALL_64_fastpath+0x16/0x73
[   16.646134] Code: 00 00 74 08 49 39 cc 74 10 83 c2 01 48 8b 71 10 48
39 f0 48 8d 4e f0 75 e2 89 d0 41 0f af c2 eb 02 31 c0 8b 8f e0 b8 00 00
3 
[   16.667331] RIP  [<ffffffffa01154e3>] skl_update_pipe_wm+0xc3/0x870
[i915]
[   16.674965]  RSP <ffff8801783036c0>
[   16.681229] ---[ end trace 42f41653f5df7793 ]---

-Mika-

On Mon, 2015-10-12 at 22:55 +0530, Uma Shankar wrote:
> During bootup, mipi display was blanking in BXT. This is because during
> driver load, though encoder, connector were active but crtc returned
> inactive. This caused sanitize function to disable the DSI panel. In AOS,
> this is fine since HWC will do a modeset and crtc, connector, encoder
> mapping will be restored. But in Charging OS, no modeset is called, it
> just calls DPMS ON/OFF. Hence display doesn't come in COS. This is needed
> even for seamless booting to Android without a blank.
> 
> This is fine on BYT/CHT since transcoder is common b/w all encoders. But
> for BXT, there is a separate mipi transcoder. Hence this needs special
> handling for BXT DSI.
> 
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h      |    3 +++
>  drivers/gpu/drm/i915/intel_display.c |   27 +++++++++++++++++++++++----
>  2 files changed, 26 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index bf14096..ae790ec 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1948,6 +1948,9 @@ struct drm_i915_private {
>  	/* perform PHY state sanity checks? */
>  	bool chv_phy_assert[2];
>  
> +	/* To check if DSI is initializing at bootup */
> +	bool dsi_enumerating;
> +
>  	/*
>  	 * NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch
>  	 * will be rejected. Instead look for a better place.
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 2717823..fe4f4f3 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -7711,6 +7711,9 @@ static void intel_get_pipe_timings(struct intel_crtc *crtc,
>  	bool is_dsi = intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI);
>  	uint32_t tmp;
>  
> +	if (dev_priv->dsi_enumerating && dev_priv->vbt.has_mipi)
> +		is_dsi = true;
> +
>  	tmp = I915_READ(HTOTAL(cpu_transcoder));
>  	pipe_config->base.adjusted_mode.crtc_hdisplay = (tmp & 0xffff) + 1;
>  	pipe_config->base.adjusted_mode.crtc_htotal = ((tmp >> 16) & 0xffff) + 1;
> @@ -9825,10 +9828,20 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
>  	is_dsi = intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI);
>  
>  	/*
> -	 * Check if encoder is enabled or not
> +	 * Check if encoder is enabled or not.
>  	 * Separate implementation for DSI and DDI encoders.
> +	 * For first time during driver init, encoder association
> +	 * would not have happened and this function will return
> +	 * false. This will cause encoder to be disabled causing
> +	 * a blank, till user space does a modeset. In order to avoid
> +	 * this, if DSI is enabled in VBT, for first iteration, this
> +	 * will return true since BIOS would have initialized MIPI.
> +	 * This is needed for seamless booting without blanking and
> +	 * for Charging OS scenario. Since DSI is the first display in
> +	 * setup_outputs, hence first crtc will be associated with mipi
> +	 * display
>  	 */
> -	if (is_dsi) {
> +	if (is_dsi || (dev_priv->dsi_enumerating && dev_priv->vbt.has_mipi)) {
>  		struct intel_encoder *encoder;
>  
>  		for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
> @@ -9852,8 +9865,11 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
>  			if (dsi_enc_enabled)
>  				break;
>  		}
> -		if (!dsi_enc_enabled)
> -			return false;
> +
> +		 if (!dsi_enc_enabled) {
> +			if (!dev_priv->dsi_enumerating)
> +				return false;
> +		}
>  	} else {
>  
>  		tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
> @@ -9921,6 +9937,8 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
>  		pipe_config->pixel_multiplier = 1;
>  	}
>  
> +	dev_priv->dsi_enumerating = false;
> +
>  	return true;
>  }
>  
> @@ -14877,6 +14895,7 @@ void intel_modeset_init(struct drm_device *dev)
>  	enum pipe pipe;
>  	struct intel_crtc *crtc;
>  
> +	dev_priv->dsi_enumerating = true;
>  	drm_mode_config_init(dev);
>  
>  	dev->mode_config.min_width = 0;


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