From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Feiner Subject: [kvm-unit-tests v2 4/8] x86: eventinj: make test work with -O0 Date: Wed, 2 Mar 2016 17:09:34 -0800 Message-ID: <1456967378-6367-5-git-send-email-pfeiner@google.com> References: <1456867658-10937-1-git-send-email-pfeiner@google.com> <1456967378-6367-1-git-send-email-pfeiner@google.com> Cc: pfeiner@google.com To: kvm@vger.kernel.org, drjones@redhat.com, pbonzini@redhat.com Return-path: Received: from mail-pa0-f44.google.com ([209.85.220.44]:36303 "EHLO mail-pa0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751243AbcCCBJy (ORCPT ); Wed, 2 Mar 2016 20:09:54 -0500 Received: by mail-pa0-f44.google.com with SMTP id fi3so2364476pac.3 for ; Wed, 02 Mar 2016 17:09:53 -0800 (PST) In-Reply-To: <1456967378-6367-1-git-send-email-pfeiner@google.com> Sender: kvm-owner@vger.kernel.org List-ID: With optimizations disabled, the compiler generated a call for irq_enable() -- rather than just inlining an sti instruction as expected. Thus the irq_enable ret would run in the sti shadow and the vectors would fire in the wrong order. Signed-off-by: Peter Feiner --- x86/eventinj.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/x86/eventinj.c b/x86/eventinj.c index bddedce..202ac19 100644 --- a/x86/eventinj.c +++ b/x86/eventinj.c @@ -296,8 +296,7 @@ int main() apic_self_ipi(32); flush_stack(); io_delay(); - irq_enable(); - asm volatile ("int $33"); + asm volatile ("sti; int $33"); irq_disable(); printf("After vec 32 and int $33\n"); report("vec 32/int $33", test_count == 2); -- 2.7.0.rc3.207.g0ac5344