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diff for duplicates of <1457946103-13853-1-git-send-email-larper@axis.com>

diff --git a/a/1.txt b/N1/1.txt
index e9d4100..940ca38 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -19,7 +19,7 @@ index 3043016..3fac4c4 100644
  	};
  
 -	/* PLL1 is used by CPU and some peripherals */
--	pll1_clk: pll1_clk at f8000000 {
+-	pll1_clk: pll1_clk@f8000000 {
 +	eth_phy_ref_clk: eth_phy_ref_clk {
  		#clock-cells = <0>;
 -		compatible = "axis,artpec6-pll1-clock";
@@ -69,7 +69,7 @@ index 3043016..3fac4c4 100644
 -		compatible = "fixed-factor-clock";
 -		clock-div = <1>;
 -		clock-mult = <24>;
-+	clkctrl: clkctrl at 0xf8000000 {
++	clkctrl: clkctrl@0xf8000000 {
 +		#clock-cells = <1>;
 +		compatible = "axis,artpec6-clkctrl";
 +		reg = <0xf8000000 0x48>;
@@ -104,7 +104,7 @@ index 3043016..3fac4c4 100644
 -	};
 -
 -
- 	gtimer at faf00200 {
+ 	gtimer@faf00200 {
  		compatible = "arm,cortex-a9-global-timer";
  		reg = <0xfaf00200 0x20>;
  		interrupts = <GIC_PPI 11 0xf01>;
@@ -112,7 +112,7 @@ index 3043016..3fac4c4 100644
 +		clocks = <&clkctrl 1>;
  	};
  
- 	timer at faf00600 {
+ 	timer@faf00600 {
  		compatible = "arm,cortex-a9-twd-timer";
  		reg = <0xfaf00600 0x20>;
  		interrupts = <GIC_PPI 13 0xf04>;
@@ -123,7 +123,7 @@ index 3043016..3fac4c4 100644
  
 @@ -220,7 +156,8 @@
  
- 		ethernet: ethernet at f8010000 {
+ 		ethernet: ethernet@f8010000 {
  			clock-names = "phy_ref_clk", "apb_pclk";
 -			clocks = <&ext_clk>, <&apb_pclk>;
 +			clocks = <&eth_phy_ref_clk>,
diff --git a/a/content_digest b/N1/content_digest
index 2cd39aa..0d94f9d 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,7 +1,12 @@
- "From\0lars.persson@axis.com (Lars Persson)\0"
+ "From\0Lars Persson <lars.persson@axis.com>\0"
  "Subject\0[PATCH v2] ARM: dts: artpec: update clock bindings in artpec6.dtsi\0"
  "Date\0Mon, 14 Mar 2016 10:01:43 +0100\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0arm@kernel.org"
+  linux-arm-kernel@lists.infradead.org
+ " olof@lixom.net\0"
+ "Cc\0linux@arm.linux.org.uk"
+  linux-kernel@vger.kernel.org
+ " Lars Persson <larper@axis.com>\0"
  "\00:1\0"
  "b\0"
  "The clock binding for the main clock controller was changed to an\n"
@@ -25,7 +30,7 @@
  " \t};\n"
  " \n"
  "-\t/* PLL1 is used by CPU and some peripherals */\n"
- "-\tpll1_clk: pll1_clk at f8000000 {\n"
+ "-\tpll1_clk: pll1_clk@f8000000 {\n"
  "+\teth_phy_ref_clk: eth_phy_ref_clk {\n"
  " \t\t#clock-cells = <0>;\n"
  "-\t\tcompatible = \"axis,artpec6-pll1-clock\";\n"
@@ -75,7 +80,7 @@
  "-\t\tcompatible = \"fixed-factor-clock\";\n"
  "-\t\tclock-div = <1>;\n"
  "-\t\tclock-mult = <24>;\n"
- "+\tclkctrl: clkctrl at 0xf8000000 {\n"
+ "+\tclkctrl: clkctrl@0xf8000000 {\n"
  "+\t\t#clock-cells = <1>;\n"
  "+\t\tcompatible = \"axis,artpec6-clkctrl\";\n"
  "+\t\treg = <0xf8000000 0x48>;\n"
@@ -110,7 +115,7 @@
  "-\t};\n"
  "-\n"
  "-\n"
- " \tgtimer at faf00200 {\n"
+ " \tgtimer@faf00200 {\n"
  " \t\tcompatible = \"arm,cortex-a9-global-timer\";\n"
  " \t\treg = <0xfaf00200 0x20>;\n"
  " \t\tinterrupts = <GIC_PPI 11 0xf01>;\n"
@@ -118,7 +123,7 @@
  "+\t\tclocks = <&clkctrl 1>;\n"
  " \t};\n"
  " \n"
- " \ttimer at faf00600 {\n"
+ " \ttimer@faf00600 {\n"
  " \t\tcompatible = \"arm,cortex-a9-twd-timer\";\n"
  " \t\treg = <0xfaf00600 0x20>;\n"
  " \t\tinterrupts = <GIC_PPI 13 0xf04>;\n"
@@ -129,7 +134,7 @@
  " \n"
  "@@ -220,7 +156,8 @@\n"
  " \n"
- " \t\tethernet: ethernet at f8010000 {\n"
+ " \t\tethernet: ethernet@f8010000 {\n"
  " \t\t\tclock-names = \"phy_ref_clk\", \"apb_pclk\";\n"
  "-\t\t\tclocks = <&ext_clk>, <&apb_pclk>;\n"
  "+\t\t\tclocks = <&eth_phy_ref_clk>,\n"
@@ -180,4 +185,4 @@
  "-- \n"
  2.1.4
 
-a38eb26954789e74eaebdcfe1382a2ed493ea47d9ef271b6d53873fa490f5040
+e9ef98c01d912e6b7ee1bb3bdb3ed42f40b2032b18f714a24069ea8d41156748

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