From: Ander Conselvan De Oliveira <conselvan2@gmail.com>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 (rebased) 4/4] drm/i915: Add locking to pll updates, v3.
Date: Wed, 30 Mar 2016 14:45:23 +0300 [thread overview]
Message-ID: <1459338323.2949.3.camel@gmail.com> (raw)
In-Reply-To: <56F29F50.1090708@linux.intel.com>
On Wed, 2016-03-23 at 14:51 +0100, Maarten Lankhorst wrote:
> With async modesets this is no longer protected with connection_mutex,
> so ensure that each pll has its own lock. The pll configuration state
> is still protected; it's only the pll updates that need locking against
> concurrency.
>
> Changes since v1:
> - Rebased.
> - Fix locking to protect all accesses. (Durgadoss)
> Changes since v2:
> - Make the dpll_lock global to protect concurrent updates to the
> same register, for example DPLL_CTRL1 on skl. (Ander)
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
> ---
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 06e4773ae7f6..a66732744494 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1854,6 +1854,13 @@ struct drm_i915_private {
> struct intel_shared_dpll shared_dplls[I915_NUM_PLLS];
> const struct intel_dpll_mgr *dpll_mgr;
>
> + /*
> + * dpll_lock serializes intel_{prepare,enable,disable}_shared_dpll.
> + * Must be global rather than per dpll, because on some platforms
> + * plls share registers.
> + */
> + struct mutex dpll_lock;
> +
> unsigned int active_crtcs;
> unsigned int min_pixclk[I915_MAX_PIPES];
>
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index 19bfe6743ef2..1175eebfe03b 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -89,14 +89,16 @@ void intel_prepare_shared_dpll(struct intel_crtc *crtc)
> if (WARN_ON(pll == NULL))
> return;
>
> + mutex_lock(&dev_priv->dpll_lock);
> WARN_ON(!pll->config.crtc_mask);
> - if (pll->active_mask == 0) {
> + if (!pll->active_mask) {
> DRM_DEBUG_DRIVER("setting up %s\n", pll->name);
> WARN_ON(pll->on);
> assert_shared_dpll_disabled(dev_priv, pll);
>
> pll->funcs.mode_set(dev_priv, pll);
> }
> + mutex_unlock(&dev_priv->dpll_lock);
> }
>
> /**
> @@ -113,14 +115,17 @@ void intel_enable_shared_dpll(struct intel_crtc *crtc)
> struct drm_i915_private *dev_priv = dev->dev_private;
> struct intel_shared_dpll *pll = crtc->config->shared_dpll;
> unsigned crtc_mask = 1 << drm_crtc_index(&crtc->base);
> - unsigned old_mask = pll->active_mask;
> + unsigned old_mask;
>
> if (WARN_ON(pll == NULL))
> return;
>
> + mutex_lock(&dev_priv->dpll_lock);
> + old_mask = pll->active_mask;
> +
> if (WARN_ON(!(pll->config.crtc_mask & crtc_mask)) ||
> WARN_ON(pll->active_mask & crtc_mask))
> - return;
> + goto out;
>
> pll->active_mask |= crtc_mask;
>
> @@ -131,13 +136,16 @@ void intel_enable_shared_dpll(struct intel_crtc *crtc)
> if (old_mask) {
> WARN_ON(!pll->on);
> assert_shared_dpll_enabled(dev_priv, pll);
> - return;
> + goto out;
> }
> WARN_ON(pll->on);
>
> DRM_DEBUG_KMS("enabling %s\n", pll->name);
> pll->funcs.enable(dev_priv, pll);
> pll->on = true;
> +
> +out:
> + mutex_unlock(&dev_priv->dpll_lock);
> }
>
> void intel_disable_shared_dpll(struct intel_crtc *crtc)
> @@ -154,8 +162,9 @@ void intel_disable_shared_dpll(struct intel_crtc *crtc)
> if (pll == NULL)
> return;
>
> + mutex_lock(&dev_priv->dpll_lock);
> if (WARN_ON(!(pll->active_mask & crtc_mask)))
> - return;
> + goto out;
>
> DRM_DEBUG_KMS("disable %s (active %x, on? %d) for crtc %d\n",
> pll->name, pll->active_mask, pll->on,
> @@ -166,11 +175,14 @@ void intel_disable_shared_dpll(struct intel_crtc *crtc)
>
> pll->active_mask &= ~crtc_mask;
> if (pll->active_mask)
> - return;
> + goto out;
>
> DRM_DEBUG_KMS("disabling %s\n", pll->name);
> pll->funcs.disable(dev_priv, pll);
> pll->on = false;
> +
> +out:
> + mutex_unlock(&dev_priv->dpll_lock);
> }
>
> static struct intel_shared_dpll *
> @@ -1750,6 +1762,7 @@ void intel_shared_dpll_init(struct drm_device *dev)
>
> dev_priv->dpll_mgr = dpll_mgr;
> dev_priv->num_shared_dpll = i;
> + mutex_init(&dev_priv->dpll_lock);
>
> BUG_ON(dev_priv->num_shared_dpll > I915_NUM_PLLS);
>
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2016-03-30 11:45 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-14 8:27 [PATCH v2 (rebased) 0/4] Prepare dpll for async Maarten Lankhorst
2016-03-14 8:27 ` [PATCH v2 (rebased) 1/4] drm/i915: Use a crtc mask instead of a refcount for dpll functions, v2 Maarten Lankhorst
2016-03-16 14:59 ` Ander Conselvan De Oliveira
2016-03-14 8:27 ` [PATCH v2 (rebased) 2/4] drm/i915: Perform dpll commit first, v2 Maarten Lankhorst
2016-03-16 15:07 ` Ander Conselvan De Oliveira
2016-03-14 8:27 ` [PATCH v2 (rebased) 3/4] drm/i915: Move pll power state to crtc power domains Maarten Lankhorst
2016-03-16 15:14 ` Ander Conselvan De Oliveira
2016-03-14 8:27 ` [PATCH v2 (rebased) 4/4] drm/i915: Add locking to pll updates, v2 Maarten Lankhorst
2016-03-16 16:19 ` Ander Conselvan De Oliveira
2016-03-16 17:48 ` Maarten Lankhorst
2016-03-17 9:16 ` Ander Conselvan De Oliveira
2016-03-23 13:51 ` [PATCH v3 (rebased) 4/4] drm/i915: Add locking to pll updates, v3 Maarten Lankhorst
2016-03-30 11:45 ` Ander Conselvan De Oliveira [this message]
2016-03-14 8:30 ` ✗ Fi.CI.BAT: failure for Prepare dpll for async. (rev2) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1459338323.2949.3.camel@gmail.com \
--to=conselvan2@gmail.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=maarten.lankhorst@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.