From mboxrd@z Thu Jan  1 00:00:00 1970
From: Imre Deak <imre.deak@intel.com>
Subject: [PATCH 02/16] drm/i915/bxt: Fix GRC code register field
	definitions
Date: Fri,  1 Apr 2016 16:02:33 +0300
Message-ID: <1459515767-29228-3-git-send-email-imre.deak@intel.com>
References: <1459515767-29228-1-git-send-email-imre.deak@intel.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: base64
Return-path: <intel-gfx-bounces@lists.freedesktop.org>
Received: from mga01.intel.com (mga01.intel.com [192.55.52.88])
 by gabe.freedesktop.org (Postfix) with ESMTP id 53D7E6ECCA
 for <intel-gfx@lists.freedesktop.org>; Fri,  1 Apr 2016 13:03:19 +0000 (UTC)
In-Reply-To: <1459515767-29228-1-git-send-email-imre.deak@intel.com>
List-Unsubscribe: <https://lists.freedesktop.org/mailman/options/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <https://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <https://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Errors-To: intel-gfx-bounces@lists.freedesktop.org
Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
To: intel-gfx@lists.freedesktop.org
Cc: Arthur J Runyan <arthur.j.runyan@intel.com>
List-Id: intel-gfx@lists.freedesktop.org

VGhpcyBoYXMgYmVlbiBjb3JyZWN0ZWQgaW4gQlNwZWMgcXVpdGUgc29tZSB0aW1lIGFnbywgYnV0
IHdlIG1pc3NlZCBpdApzb21laG93LiBUaGUgd3JvbmcgZmllbGQgZGVmaW5pdGlvbnMgcmVzdWx0
ZWQgaW4gY29uZmlndXJpbmcgUEhZMCB3aXRoCmFuIGluY29ycmVjdCBHUkMgdmFsdWUuCgpDQzog
QXJ0aHVyIEogUnVueWFuIDxhcnRodXIuai5ydW55YW5AaW50ZWwuY29tPgpTaWduZWQtb2ZmLWJ5
OiBJbXJlIERlYWsgPGltcmUuZGVha0BpbnRlbC5jb20+Ci0tLQogZHJpdmVycy9ncHUvZHJtL2k5
MTUvaTkxNV9yZWcuaCB8IDYgKysrLS0tCiAxIGZpbGUgY2hhbmdlZCwgMyBpbnNlcnRpb25zKCsp
LCAzIGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVf
cmVnLmggYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oCmluZGV4IDZkZjNjNTkuLmY0
YTkxYmIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVnLmgKKysrIGIv
ZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcuaApAQCAtMTM3MywxMCArMTM3MywxMCBAQCBl
bnVtIHNrbF9kaXNwX3Bvd2VyX3dlbGxzIHsKICAqIEZJWE1FOiBCU3BlYy9DSFYgQ29uZmlnREIg
ZGlzYWdyZWVzIG9uIHRoZSBmb2xsb3dpbmcgdHdvIGZpZWxkcywgZml4IHRoZW0KICAqIGFmdGVy
IHRlc3RpbmcuCiAgKi8KLSNkZWZpbmUgICBHUkNfQ09ERV9TSElGVAkJMjMKLSNkZWZpbmUgICBH
UkNfQ09ERV9NQVNLCQkJKDB4MUZGIDw8IEdSQ19DT0RFX1NISUZUKQorI2RlZmluZSAgIEdSQ19D
T0RFX1NISUZUCQkyNAorI2RlZmluZSAgIEdSQ19DT0RFX01BU0sJCQkoMHhGRiA8PCBHUkNfQ09E
RV9TSElGVCkKICNkZWZpbmUgICBHUkNfQ09ERV9GQVNUX1NISUZUCQkxNgotI2RlZmluZSAgIEdS
Q19DT0RFX0ZBU1RfTUFTSwkJKDB4N0YgPDwgR1JDX0NPREVfRkFTVF9TSElGVCkKKyNkZWZpbmUg
ICBHUkNfQ09ERV9GQVNUX01BU0sJCSgweEZGIDw8IEdSQ19DT0RFX0ZBU1RfU0hJRlQpCiAjZGVm
aW5lICAgR1JDX0NPREVfU0xPV19TSElGVAkJOAogI2RlZmluZSAgIEdSQ19DT0RFX1NMT1dfTUFT
SwkJKDB4RkYgPDwgR1JDX0NPREVfU0xPV19TSElGVCkKICNkZWZpbmUgICBHUkNfQ09ERV9OT01f
TUFTSwkJMHhGRgotLSAKMi41LjAKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f
X19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVk
ZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZv
L2ludGVsLWdmeAo=