From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linuxfoundation.org ([140.211.169.12]:50213 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756070AbcDJSBH (ORCPT ); Sun, 10 Apr 2016 14:01:07 -0400 Subject: Patch "clk: rockchip: rk3368: fix parents of video encoder/decoder" has been added to the 4.4-stable tree To: heiko@sntech.de, gregkh@linuxfoundation.org, zhangqing@rock-chips.com Cc: , From: Date: Sun, 10 Apr 2016 11:01:04 -0700 Message-ID: <146031126413234@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: This is a note to let you know that I've just added the patch titled clk: rockchip: rk3368: fix parents of video encoder/decoder to the 4.4-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: clk-rockchip-rk3368-fix-parents-of-video-encoder-decoder.patch and it can be found in the queue-4.4 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >>From 0f28d98463498c61c61a38aacbf9f69e92e85e9d Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 20 Jan 2016 19:22:38 +0100 Subject: clk: rockchip: rk3368: fix parents of video encoder/decoder From: Heiko Stuebner commit 0f28d98463498c61c61a38aacbf9f69e92e85e9d upstream. The vdpu and vepu clocks can also be parented to the npll and current parent list also is wrong as it would use the npll as "usbphy" source, so adapt the parent to the correct one. Fixes: 3536c97a52db ("clk: rockchip: add rk3368 clock controller") Signed-off-by: Heiko Stuebner Reviewed-by: zhangqing Signed-off-by: Greg Kroah-Hartman --- drivers/clk/rockchip/clk-rk3368.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/drivers/clk/rockchip/clk-rk3368.c +++ b/drivers/clk/rockchip/clk-rk3368.c @@ -384,10 +384,10 @@ static struct rockchip_clk_branch rk3368 * Clock-Architecture Diagram 3 */ - COMPOSITE(0, "aclk_vepu", mux_pll_src_cpll_gpll_usb_p, 0, + COMPOSITE(0, "aclk_vepu", mux_pll_src_cpll_gpll_npll_usb_p, 0, RK3368_CLKSEL_CON(15), 6, 2, MFLAGS, 0, 5, DFLAGS, RK3368_CLKGATE_CON(4), 6, GFLAGS), - COMPOSITE(0, "aclk_vdpu", mux_pll_src_cpll_gpll_usb_p, 0, + COMPOSITE(0, "aclk_vdpu", mux_pll_src_cpll_gpll_npll_usb_p, 0, RK3368_CLKSEL_CON(15), 14, 2, MFLAGS, 8, 5, DFLAGS, RK3368_CLKGATE_CON(4), 7, GFLAGS), Patches currently in stable-queue which might be from heiko@sntech.de are queue-4.4/clk-rockchip-rk3368-fix-cpuclk-core-dividers.patch queue-4.4/clk-rockchip-rk3368-fix-parents-of-video-encoder-decoder.patch queue-4.4/clk-rockchip-rk3368-fix-hdmi_cec-gate-register.patch queue-4.4/clk-rockchip-rk3368-fix-cpuclk-mux-bit-of-big-cpu-cluster.patch queue-4.4/clk-rockchip-add-hclk_cpubus-to-the-list-of-rk3188-critical-clocks.patch