From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linuxfoundation.org ([140.211.169.12]:50255 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756135AbcDJSBO (ORCPT ); Sun, 10 Apr 2016 14:01:14 -0400 Subject: Patch "clk: rockchip: rk3368: fix cpuclk mux bit of big cpu-cluster" has been added to the 4.5-stable tree To: heiko@sntech.de, gregkh@linuxfoundation.org, zhangqing@rock-chips.com Cc: , From: Date: Sun, 10 Apr 2016 11:01:11 -0700 Message-ID: <1460311271183186@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: This is a note to let you know that I've just added the patch titled clk: rockchip: rk3368: fix cpuclk mux bit of big cpu-cluster to the 4.5-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: clk-rockchip-rk3368-fix-cpuclk-mux-bit-of-big-cpu-cluster.patch and it can be found in the queue-4.5 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >>From 535ebd428aeb07c3327947281306f2943f2c9faa Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 19 Jan 2016 10:01:08 +0100 Subject: clk: rockchip: rk3368: fix cpuclk mux bit of big cpu-cluster From: Heiko Stuebner commit 535ebd428aeb07c3327947281306f2943f2c9faa upstream. Both clusters have their mux bit in bit 7 of their respective register. For whatever reason the big cluster currently lists bit 15 which is definitly wrong. Fixes: 3536c97a52db ("clk: rockchip: add rk3368 clock controller") Reported-by: Zhang Qing Signed-off-by: Heiko Stuebner Reviewed-by: zhangqing Signed-off-by: Greg Kroah-Hartman --- drivers/clk/rockchip/clk-rk3368.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/clk/rockchip/clk-rk3368.c +++ b/drivers/clk/rockchip/clk-rk3368.c @@ -165,7 +165,7 @@ static const struct rockchip_cpuclk_reg_ .core_reg = RK3368_CLKSEL_CON(0), .div_core_shift = 0, .div_core_mask = 0x1f, - .mux_core_shift = 15, + .mux_core_shift = 7, }; static const struct rockchip_cpuclk_reg_data rk3368_cpuclkl_data = { Patches currently in stable-queue which might be from heiko@sntech.de are queue-4.5/clk-rockchip-rk3368-fix-cpuclk-core-dividers.patch queue-4.5/clk-rockchip-rk3368-fix-parents-of-video-encoder-decoder.patch queue-4.5/clk-rockchip-rk3368-fix-hdmi_cec-gate-register.patch queue-4.5/clk-rockchip-rk3368-fix-cpuclk-mux-bit-of-big-cpu-cluster.patch queue-4.5/clk-rockchip-add-hclk_cpubus-to-the-list-of-rk3188-critical-clocks.patch