From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linuxfoundation.org ([140.211.169.12]:50251 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756139AbcDJSBP (ORCPT ); Sun, 10 Apr 2016 14:01:15 -0400 Subject: Patch "clk: rockchip: rk3368: fix hdmi_cec gate-register" has been added to the 4.5-stable tree To: heiko@sntech.de, gregkh@linuxfoundation.org, zhangqing@rock-chips.com Cc: , From: Date: Sun, 10 Apr 2016 11:01:12 -0700 Message-ID: <1460311272223206@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: This is a note to let you know that I've just added the patch titled clk: rockchip: rk3368: fix hdmi_cec gate-register to the 4.5-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: clk-rockchip-rk3368-fix-hdmi_cec-gate-register.patch and it can be found in the queue-4.5 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >>From fd0c0740fac17a014704ef89d8c8b1768711ca59 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 20 Jan 2016 21:47:57 +0100 Subject: clk: rockchip: rk3368: fix hdmi_cec gate-register From: Heiko Stuebner commit fd0c0740fac17a014704ef89d8c8b1768711ca59 upstream. Fix a typo making the sclk_hdmi_cec access a wrong register to handle its gate. Fixes: 3536c97a52db ("clk: rockchip: add rk3368 clock controller") Signed-off-by: Heiko Stuebner Reviewed-by: zhangqing Signed-off-by: Greg Kroah-Hartman --- drivers/clk/rockchip/clk-rk3368.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/clk/rockchip/clk-rk3368.c +++ b/drivers/clk/rockchip/clk-rk3368.c @@ -442,7 +442,7 @@ static struct rockchip_clk_branch rk3368 GATE(SCLK_HDMI_HDCP, "sclk_hdmi_hdcp", "xin24m", 0, RK3368_CLKGATE_CON(4), 13, GFLAGS), GATE(SCLK_HDMI_CEC, "sclk_hdmi_cec", "xin32k", 0, - RK3368_CLKGATE_CON(5), 12, GFLAGS), + RK3368_CLKGATE_CON(4), 12, GFLAGS), COMPOSITE_NODIV(0, "vip_src", mux_pll_src_cpll_gpll_p, 0, RK3368_CLKSEL_CON(21), 15, 1, MFLAGS, Patches currently in stable-queue which might be from heiko@sntech.de are queue-4.5/clk-rockchip-rk3368-fix-cpuclk-core-dividers.patch queue-4.5/clk-rockchip-rk3368-fix-parents-of-video-encoder-decoder.patch queue-4.5/clk-rockchip-rk3368-fix-hdmi_cec-gate-register.patch queue-4.5/clk-rockchip-rk3368-fix-cpuclk-mux-bit-of-big-cpu-cluster.patch queue-4.5/clk-rockchip-add-hclk_cpubus-to-the-list-of-rk3188-critical-clocks.patch