From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 05/10] drm/i915: Clear display interrupt before enabling when turning on the power well Date: Mon, 11 Apr 2016 19:36:30 +0300 Message-ID: <1460392590.12168.46.camel@intel.com> References: <1460382992-28728-1-git-send-email-ville.syrjala@linux.intel.com> <1460382992-28728-6-git-send-email-ville.syrjala@linux.intel.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 7FC716E5D6 for ; Mon, 11 Apr 2016 16:37:18 +0000 (UTC) In-Reply-To: <1460382992-28728-6-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T24gbWEsIDIwMTYtMDQtMTEgYXQgMTY6NTYgKzAzMDAsIHZpbGxlLnN5cmphbGFAbGludXguaW50 ZWwuY29tIHdyb3RlOgo+IEZyb206IFZpbGxlIFN5cmrDpGzDpCA8dmlsbGUuc3lyamFsYUBsaW51 eC5pbnRlbC5jb20+Cj4gCj4gRm9yIGEgYml0IG9mIGV4dHJhIHBhcmFub2lhIG1ha2Ugc3VyZSB0 aGUgZGlzcGxheSBpcnFzIGFyZSBhbGwKPiBjbGVhcmVkCj4gYmVmb3JlIHdlIGVuYWJsZWQgdGhl bSB3aGVuIHR1cm5pbmcgb24gdGhlIHBvd2VyIHdlbGwuIFRoaXMgc2hvdWxkCj4gcmVhbGx5IGJl IHRoZSBjYXNlIGFscmVhZHkgc2luY2UgdGhlIHBvd2VyIHdlbGwgd2FzIG9mZiB3aGljaCByZXNl dHMKPiBldmVyeXRoaW5nLgo+IAo+IFNpZ25lZC1vZmYtYnk6IFZpbGxlIFN5cmrDpGzDpCA8dmls bGUuc3lyamFsYUBsaW51eC5pbnRlbC5jb20+CgpSZXZpZXdlZC1ieTogSW1yZSBEZWFrIDxpbXJl LmRlYWtAaW50ZWwuY29tPgoKPiAtLS0KPiDCoGRyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfaXJx LmMgfCAxMSArKystLS0tLS0tLQo+IMKgMSBmaWxlIGNoYW5nZWQsIDMgaW5zZXJ0aW9ucygrKSwg OCBkZWxldGlvbnMoLSkKPiAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkx NV9pcnEuYwo+IGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9pcnEuYwo+IGluZGV4IGMxMTk2 MTBlMmQ1Ny4uNjc4YzZiODY4NjJlIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1 L2k5MTVfaXJxLmMKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X2lycS5jCj4gQEAg LTMzMDYsMTMgKzMzMDYsNiBAQCBzdGF0aWMgdm9pZCB2bHZfZGlzcGxheV9pcnFfcG9zdGluc3Rh bGwoc3RydWN0Cj4gZHJtX2k5MTVfcHJpdmF0ZSAqZGV2X3ByaXYpCj4gwqAJdTMyIGlpcl9tYXNr Owo+IMKgCWVudW0gcGlwZSBwaXBlOwo+IMKgCj4gLQlwaXBlc3RhdF9tYXNrID0gUElQRVNUQVRf SU5UX1NUQVRVU19NQVNLIHwKPiAtCQkJUElQRV9GSUZPX1VOREVSUlVOX1NUQVRVUzsKPiAtCj4g LQlmb3JfZWFjaF9waXBlKGRldl9wcml2LCBwaXBlKQo+IC0JCUk5MTVfV1JJVEUoUElQRVNUQVQo cGlwZSksIHBpcGVzdGF0X21hc2spOwo+IC0JUE9TVElOR19SRUFEKFBJUEVTVEFUKFBJUEVfQSkp Owo+IC0KPiDCoAlwaXBlc3RhdF9tYXNrID0gUExBTkVfRkxJUF9ET05FX0lOVF9TVEFUVVNfVkxW IHwKPiDCoAkJCVBJUEVfQ1JDX0RPTkVfSU5URVJSVVBUX1NUQVRVUzsKPiDCoAo+IEBAIC0zNjk2 LDggKzM2ODksMTAgQEAgdm9pZCB2YWxsZXl2aWV3X2VuYWJsZV9kaXNwbGF5X2lycXMoc3RydWN0 Cj4gZHJtX2k5MTVfcHJpdmF0ZSAqZGV2X3ByaXYpCj4gwqAKPiDCoAlkZXZfcHJpdi0+ZGlzcGxh eV9pcnFzX2VuYWJsZWQgPSB0cnVlOwo+IMKgCj4gLQlpZiAoaW50ZWxfaXJxc19lbmFibGVkKGRl dl9wcml2KSkKPiArCWlmIChpbnRlbF9pcnFzX2VuYWJsZWQoZGV2X3ByaXYpKSB7Cj4gKwkJdmx2 X2Rpc3BsYXlfaXJxX3Jlc2V0KGRldl9wcml2KTsKPiDCoAkJdmx2X2Rpc3BsYXlfaXJxX3Bvc3Rp bnN0YWxsKGRldl9wcml2KTsKPiArCX0KPiDCoH0KPiDCoAo+IMKgdm9pZCB2YWxsZXl2aWV3X2Rp c2FibGVfZGlzcGxheV9pcnFzKHN0cnVjdCBkcm1faTkxNV9wcml2YXRlCj4gKmRldl9wcml2KQpf X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZngg bWFpbGluZyBsaXN0CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0 cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZngK