diff for duplicates of <1460393270.5119.20.camel@synopsys.com> diff --git a/a/1.txt b/N1/1.txt index 2baf756..8ffa601 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,134 +1,122 @@ Hi Jose, -On Mon, 2016-04-11 at 11:41 +-0100, Jose Abreu wrote: -+AD4- The ARC SDP I2S clock can be programmed using a -+AD4- specific PLL. -+AD4-=20 -+AD4- This patch has the goal of adding a clock driver -+AD4- that programs this PLL. -+AD4-=20 -+AD4- At this moment the rate values are hardcoded in -+AD4- a table but in the future it would be ideal to -+AD4- use a function which determines the PLL values -+AD4- given the desired rate. -+AD4-=20 -+AD4- Signed-off-by: Jose Abreu +ADw-joabreu+AEA-synopsys.com+AD4- -+AD4- --- -+AD4-=20 -+AD4- Changes v3 -+AD4- v4: -+AD4- +ACo- Added binding document (as suggested by Stephen Boyd) -+AD4- +ACo- Minor code style fixes (as suggested by Stephen Boyd) -+AD4- +ACo- Use ioremap (as suggested by Stephen Boyd) -+AD4- +ACo- Implement round+AF8-rate (as suggested by Stephen Boyd) -+AD4- +ACo- Change to platform driver (as suggested by Stephen Boyd) -+AD4- +ACo- Use +AHs-readl/writel+AH0AXw-relaxed (as suggested by Vineet Gu= -pta) -+AD4-=20 -+AD4- Changes v2 -+AD4- v3: -+AD4- +ACo- Implemented recalc+AF8-rate -+AD4-=20 -+AD4- Changes v1 -+AD4- v2: -+AD4- +ACo- Renamed folder to axs10x (as suggested by Alexey Brodkin) -+AD4- +ACo- Added more supported rates +On Mon, 2016-04-11@11:41 +0100, Jose Abreu wrote: +> The ARC SDP I2S clock can be programmed using a +> specific PLL. +> +> This patch has the goal of adding a clock driver +> that programs this PLL. +> +> At this moment the rate values are hardcoded in +> a table but in the future it would be ideal to +> use a function which determines the PLL values +> given the desired rate. +> +> Signed-off-by: Jose Abreu <joabreu at synopsys.com> +> --- +> +> Changes v3 -> v4: +> * Added binding document (as suggested by Stephen Boyd) +> * Minor code style fixes (as suggested by Stephen Boyd) +> * Use ioremap (as suggested by Stephen Boyd) +> * Implement round_rate (as suggested by Stephen Boyd) +> * Change to platform driver (as suggested by Stephen Boyd) +> * Use {readl/writel}_relaxed (as suggested by Vineet Gupta) +> +> Changes v2 -> v3: +> * Implemented recalc_rate +> +> Changes v1 -> v2: +> * Renamed folder to axs10x (as suggested by Alexey Brodkin) +> * Added more supported rates -+AFs-snip+AF0- +[snip] -+AD4- diff --git a/Documentation/devicetree/bindings/clock/i2s-pll-clock.tx= -t b/Documentation/devicetree/bindings/clock/i2s- -+AD4- pll-clock.txt -+AD4- new file mode 100644 -+AD4- index 0000000..ff86a41 -+AD4- --- /dev/null -+AD4- +-+-+- b/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt -+AD4- +AEAAQA- -0,0 +-1,17 +AEAAQA- -+AD4- +-Binding for the AXS10X I2S PLL clock -+AD4- +- -+AD4- +-This binding uses the common clock binding+AFs-1+AF0-. -+AD4- +- -+AD4- +-+AFs-1+AF0- Documentation/devicetree/bindings/clock/clock-bindings.= -txt -+AD4- +- -+AD4- +-Required properties: -+AD4- +-- compatible: shall be +ACI-snps,i2s-pll-clock+ACI- -+AD4- +-- +ACM-clock-cells: from common clock binding+ADs- Should always be= - set to 0. -+AD4- +-- reg : Address and length of the I2S PLL register set. -+AD4- +- -+AD4- +-Example: -+AD4- +- clock+AEA-0x100a0 +AHs- +> diff --git a/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt b/Documentation/devicetree/bindings/clock/i2s- +> pll-clock.txt +> new file mode 100644 +> index 0000000..ff86a41 +> --- /dev/null +> +++ b/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt +> @@ -0,0 +1,17 @@ +> +Binding for the AXS10X I2S PLL clock +> + +> +This binding uses the common clock binding[1]. +> + +> +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt +> + +> +Required properties: +> +- compatible: shall be "snps,i2s-pll-clock" +> +- #clock-cells: from common clock binding; Should always be set to 0. +> +- reg : Address and length of the I2S PLL register set. +> + +> +Example: +> + clock at 0x100a0 { -Please remove +ACI-0x+ACI- from node name. +Please remove "0x" from node name. -+AD4- +- compatible +AD0- +ACI-snps,i2s-pll-clock+ACIAOw- -+AD4- +- reg +AD0- +ADw-0x100a0 0x10+AD4AOw- -+AD4- +- +ACM-clock-cells +AD0- +ADw-0+AD4AOw- -+AD4- +- +AH0AOw- -+AD4- diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile -+AD4- index 46869d6..2ca62dc6 100644 -+AD4- --- a/drivers/clk/Makefile -+AD4- +-+-+- b/drivers/clk/Makefile -+AD4- +AEAAQA- -84,3 +-84,4 +AEAAQA- obj-+ACQ-(CONFIG+AF8-X86) +-+AD0- x8= -6/ -+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-ARCH+AF8-ZX) +-+AD0- zte/ -+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-ARCH+AF8-ZYNQ) +-+AD0- zynq/ -+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-H8300) +-+AD0- h8300/ -+AD4- +-obj-+ACQ-(CONFIG+AF8-ARC+AF8-PLAT+AF8-AXS10X) +-+AD0- axs10x/ -+AD4- diff --git a/drivers/clk/axs10x/Makefile b/drivers/clk/axs10x/Makefil= -e -+AD4- new file mode 100644 -+AD4- index 0000000..01996b8 -+AD4- --- /dev/null -+AD4- +-+-+- b/drivers/clk/axs10x/Makefile -+AD4- +AEAAQA- -0,0 +-1 +AEAAQA- -+AD4- +-obj-y +-+AD0- i2s+AF8-pll+AF8-clock.o -+AD4- diff --git a/drivers/clk/axs10x/i2s+AF8-pll+AF8-clock.c b/drivers/clk= -/axs10x/i2s+AF8-pll+AF8-clock.c -+AD4- new file mode 100644 -+AD4- index 0000000..3ba4e2f -+AD4- --- /dev/null -+AD4- +-+-+- b/drivers/clk/axs10x/i2s+AF8-pll+AF8-clock.c -+AD4- +AEAAQA- -0,0 +-1,217 +AEAAQA- -+AD4- +-/+ACo- -+AD4- +- +ACo- Synopsys AXS10X SDP I2S PLL clock driver -+AD4- +- +ACo- -+AD4- +- +ACo- Copyright (C) 2016 Synopsys -+AD4- +- +ACo- -+AD4- +- +ACo- This file is licensed under the terms of the GNU General Pub= -lic -+AD4- +- +ACo- License version 2. This program is licensed +ACI-as is+ACI- = -without any -+AD4- +- +ACo- warranty of any kind, whether express or implied. -+AD4- +- +ACo-/ -+AD4- +- -+AD4- +-+ACM-include +ADw-linux/platform+AF8-device.h+AD4- -+AD4- +-+ACM-include +ADw-linux/module.h+AD4- -+AD4- +-+ACM-include +ADw-linux/clk-provider.h+AD4- -+AD4- +-+ACM-include +ADw-linux/err.h+AD4- -+AD4- +-+ACM-include +ADw-linux/device.h+AD4- +> + compatible = "snps,i2s-pll-clock"; +> + reg = <0x100a0 0x10>; +> + #clock-cells = <0>; +> + }; +> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile +> index 46869d6..2ca62dc6 100644 +> --- a/drivers/clk/Makefile +> +++ b/drivers/clk/Makefile +> @@ -84,3 +84,4 @@ obj-$(CONFIG_X86) += x86/ +> ?obj-$(CONFIG_ARCH_ZX) += zte/ +> ?obj-$(CONFIG_ARCH_ZYNQ) += zynq/ +> ?obj-$(CONFIG_H8300) += h8300/ +> +obj-$(CONFIG_ARC_PLAT_AXS10X) += axs10x/ +> diff --git a/drivers/clk/axs10x/Makefile b/drivers/clk/axs10x/Makefile +> new file mode 100644 +> index 0000000..01996b8 +> --- /dev/null +> +++ b/drivers/clk/axs10x/Makefile +> @@ -0,0 +1 @@ +> +obj-y += i2s_pll_clock.o +> diff --git a/drivers/clk/axs10x/i2s_pll_clock.c b/drivers/clk/axs10x/i2s_pll_clock.c +> new file mode 100644 +> index 0000000..3ba4e2f +> --- /dev/null +> +++ b/drivers/clk/axs10x/i2s_pll_clock.c +> @@ -0,0 +1,217 @@ +> +/* +> + * Synopsys AXS10X SDP I2S PLL clock driver +> + * +> + * Copyright (C) 2016 Synopsys +> + * +> + * This file is licensed under the terms of the GNU General Public +> + * License version 2. This program is licensed "as is" without any +> + * warranty of any kind, whether express or implied. +> + */ +> + +> +#include <linux/platform_device.h> +> +#include <linux/module.h> +> +#include <linux/clk-provider.h> +> +#include <linux/err.h> +> +#include <linux/device.h> -+ACI-linux/platform+AF8-device.h+ACI- includes +ACI-linux/device.h+ACI- so = -you may make this list of headers +"linux/platform_device.h" includes "linux/device.h" so you may make this list of headers a little bit shorter. -+AD4- +-+ACM-include +ADw-linux/of+AF8-address.h+AD4- -+AD4- +-+ACM-include +ADw-linux/slab.h+AD4- -+AD4- +-+ACM-include +ADw-linux/of.h+AD4- +> +#include <linux/of_address.h> +> +#include <linux/slab.h> +> +#include <linux/of.h> -+ACI-linux/of+AF8-address.h+ACI- already includes +ACI-linux/of.h+ACI-. +"linux/of_address.h" already includes "linux/of.h". -+AFs-snip+AF0- +[snip] -+AD4- +- -+AD4- +-static const struct of+AF8-device+AF8-id i2s+AF8-pll+AF8-clk+AF8-id= -+AFsAXQ- +AD0- +AHs- -+AD4- +- +AHs- .compatible +AD0- +ACI-snps,i2s-pll-clock+ACI-, +AH0-, +> + +> +static const struct of_device_id i2s_pll_clk_id[] = { +> + { .compatible = "snps,i2s-pll-clock", }, I would think that it makes sense to add the board name in -this compatible string. So something like+AKAAIg-snps,axs10x-i2s-pll-clock+= -ACI- +this compatible string. So something like?"snps,axs10x-i2s-pll-clock" IMHO looks much more informative. Also adding Rob Herring and DT mailing list in Cc. Please make sure Rod acks your bindings and corresponding docs. --Alexey= +-Alexey diff --git a/a/content_digest b/N1/content_digest index c18c468..22ba65a 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,152 +1,131 @@ "ref\050c75be8ecab225a1dd49628a173d211a02755b2.1459791946.git.joabreu@synopsys.com\0" - "From\0Alexey Brodkin <Alexey.Brodkin@synopsys.com>\0" - "Subject\0Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver\0" + "From\0Alexey.Brodkin@synopsys.com (Alexey Brodkin)\0" + "Subject\0[RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver\0" "Date\0Mon, 11 Apr 2016 16:47:51 +0000\0" - "To\0Jose Abreu <Jose.Abreu@synopsys.com>\0" - "Cc\0linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>" - robh+dt@kernel.org <robh+dt@kernel.org> - mturquette@baylibre.com <mturquette@baylibre.com> - Carlos Palminha <CARLOS.PALMINHA@synopsys.com> - devicetree@vger.kernel.org <devicetree@vger.kernel.org> - linux-snps-arc@lists.infradead.org <linux-snps-arc@lists.infradead.org> - Vineet Gupta <Vineet.Gupta1@synopsys.com> - linux-clk@vger.kernel.org <linux-clk@vger.kernel.org> - " sboyd@codeaurora.org <sboyd@codeaurora.org>\0" + "To\0linux-snps-arc@lists.infradead.org\0" "\00:1\0" "b\0" "Hi Jose,\n" "\n" - "On Mon, 2016-04-11 at 11:41 +-0100, Jose Abreu wrote:\n" - "+AD4- The ARC SDP I2S clock can be programmed using a\n" - "+AD4- specific PLL.\n" - "+AD4-=20\n" - "+AD4- This patch has the goal of adding a clock driver\n" - "+AD4- that programs this PLL.\n" - "+AD4-=20\n" - "+AD4- At this moment the rate values are hardcoded in\n" - "+AD4- a table but in the future it would be ideal to\n" - "+AD4- use a function which determines the PLL values\n" - "+AD4- given the desired rate.\n" - "+AD4-=20\n" - "+AD4- Signed-off-by: Jose Abreu +ADw-joabreu+AEA-synopsys.com+AD4-\n" - "+AD4- ---\n" - "+AD4-=20\n" - "+AD4- Changes v3 -+AD4- v4:\n" - "+AD4- +ACo- Added binding document (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Minor code style fixes (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Use ioremap (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Implement round+AF8-rate (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Change to platform driver (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Use +AHs-readl/writel+AH0AXw-relaxed (as suggested by Vineet Gu=\n" - "pta)\n" - "+AD4-=20\n" - "+AD4- Changes v2 -+AD4- v3:\n" - "+AD4- +ACo- Implemented recalc+AF8-rate\n" - "+AD4-=20\n" - "+AD4- Changes v1 -+AD4- v2:\n" - "+AD4- +ACo- Renamed folder to axs10x (as suggested by Alexey Brodkin)\n" - "+AD4- +ACo- Added more supported rates\n" + "On Mon, 2016-04-11@11:41 +0100, Jose Abreu wrote:\n" + "> The ARC SDP I2S clock can be programmed using a\n" + "> specific PLL.\n" + "> \n" + "> This patch has the goal of adding a clock driver\n" + "> that programs this PLL.\n" + "> \n" + "> At this moment the rate values are hardcoded in\n" + "> a table but in the future it would be ideal to\n" + "> use a function which determines the PLL values\n" + "> given the desired rate.\n" + "> \n" + "> Signed-off-by: Jose Abreu <joabreu at synopsys.com>\n" + "> ---\n" + "> \n" + "> Changes v3 -> v4:\n" + "> * Added binding document (as suggested by Stephen Boyd)\n" + "> * Minor code style fixes (as suggested by Stephen Boyd)\n" + "> * Use ioremap (as suggested by Stephen Boyd)\n" + "> * Implement round_rate (as suggested by Stephen Boyd)\n" + "> * Change to platform driver (as suggested by Stephen Boyd)\n" + "> * Use {readl/writel}_relaxed (as suggested by Vineet Gupta)\n" + "> \n" + "> Changes v2 -> v3:\n" + "> * Implemented recalc_rate\n" + "> \n" + "> Changes v1 -> v2:\n" + "> * Renamed folder to axs10x (as suggested by Alexey Brodkin)\n" + "> * Added more supported rates\n" "\n" - "+AFs-snip+AF0-\n" + "[snip]\n" "\n" - "+AD4- diff --git a/Documentation/devicetree/bindings/clock/i2s-pll-clock.tx=\n" - "t b/Documentation/devicetree/bindings/clock/i2s-\n" - "+AD4- pll-clock.txt\n" - "+AD4- new file mode 100644\n" - "+AD4- index 0000000..ff86a41\n" - "+AD4- --- /dev/null\n" - "+AD4- +-+-+- b/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt\n" - "+AD4- +AEAAQA- -0,0 +-1,17 +AEAAQA-\n" - "+AD4- +-Binding for the AXS10X I2S PLL clock\n" - "+AD4- +-\n" - "+AD4- +-This binding uses the common clock binding+AFs-1+AF0-.\n" - "+AD4- +-\n" - "+AD4- +-+AFs-1+AF0- Documentation/devicetree/bindings/clock/clock-bindings.=\n" - "txt\n" - "+AD4- +-\n" - "+AD4- +-Required properties:\n" - "+AD4- +-- compatible: shall be +ACI-snps,i2s-pll-clock+ACI-\n" - "+AD4- +-- +ACM-clock-cells: from common clock binding+ADs- Should always be=\n" - " set to 0.\n" - "+AD4- +-- reg : Address and length of the I2S PLL register set.\n" - "+AD4- +-\n" - "+AD4- +-Example:\n" - "+AD4- +-\tclock+AEA-0x100a0 +AHs-\n" + "> diff --git a/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt b/Documentation/devicetree/bindings/clock/i2s-\n" + "> pll-clock.txt\n" + "> new file mode 100644\n" + "> index 0000000..ff86a41\n" + "> --- /dev/null\n" + "> +++ b/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt\n" + "> @@ -0,0 +1,17 @@\n" + "> +Binding for the AXS10X I2S PLL clock\n" + "> +\n" + "> +This binding uses the common clock binding[1].\n" + "> +\n" + "> +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt\n" + "> +\n" + "> +Required properties:\n" + "> +- compatible: shall be \"snps,i2s-pll-clock\"\n" + "> +- #clock-cells: from common clock binding; Should always be set to 0.\n" + "> +- reg : Address and length of the I2S PLL register set.\n" + "> +\n" + "> +Example:\n" + "> +\tclock at 0x100a0 {\n" "\n" - "Please remove +ACI-0x+ACI- from node name.\n" + "Please remove \"0x\" from node name.\n" "\n" - "+AD4- +-\t\tcompatible +AD0- +ACI-snps,i2s-pll-clock+ACIAOw-\n" - "+AD4- +-\t\treg +AD0- +ADw-0x100a0 0x10+AD4AOw-\n" - "+AD4- +-\t\t+ACM-clock-cells +AD0- +ADw-0+AD4AOw-\n" - "+AD4- +-\t+AH0AOw-\n" - "+AD4- diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile\n" - "+AD4- index 46869d6..2ca62dc6 100644\n" - "+AD4- --- a/drivers/clk/Makefile\n" - "+AD4- +-+-+- b/drivers/clk/Makefile\n" - "+AD4- +AEAAQA- -84,3 +-84,4 +AEAAQA- obj-+ACQ-(CONFIG+AF8-X86)\t\t\t+-+AD0- x8=\n" - "6/\n" - "+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-ARCH+AF8-ZX)\t\t\t+-+AD0- zte/\n" - "+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-ARCH+AF8-ZYNQ)\t\t\t+-+AD0- zynq/\n" - "+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-H8300)\t\t+-+AD0- h8300/\n" - "+AD4- +-obj-+ACQ-(CONFIG+AF8-ARC+AF8-PLAT+AF8-AXS10X)\t\t+-+AD0- axs10x/\n" - "+AD4- diff --git a/drivers/clk/axs10x/Makefile b/drivers/clk/axs10x/Makefil=\n" - "e\n" - "+AD4- new file mode 100644\n" - "+AD4- index 0000000..01996b8\n" - "+AD4- --- /dev/null\n" - "+AD4- +-+-+- b/drivers/clk/axs10x/Makefile\n" - "+AD4- +AEAAQA- -0,0 +-1 +AEAAQA-\n" - "+AD4- +-obj-y +-+AD0- i2s+AF8-pll+AF8-clock.o\n" - "+AD4- diff --git a/drivers/clk/axs10x/i2s+AF8-pll+AF8-clock.c b/drivers/clk=\n" - "/axs10x/i2s+AF8-pll+AF8-clock.c\n" - "+AD4- new file mode 100644\n" - "+AD4- index 0000000..3ba4e2f\n" - "+AD4- --- /dev/null\n" - "+AD4- +-+-+- b/drivers/clk/axs10x/i2s+AF8-pll+AF8-clock.c\n" - "+AD4- +AEAAQA- -0,0 +-1,217 +AEAAQA-\n" - "+AD4- +-/+ACo-\n" - "+AD4- +- +ACo- Synopsys AXS10X SDP I2S PLL clock driver\n" - "+AD4- +- +ACo-\n" - "+AD4- +- +ACo- Copyright (C) 2016 Synopsys\n" - "+AD4- +- +ACo-\n" - "+AD4- +- +ACo- This file is licensed under the terms of the GNU General Pub=\n" - "lic\n" - "+AD4- +- +ACo- License version 2. This program is licensed +ACI-as is+ACI- =\n" - "without any\n" - "+AD4- +- +ACo- warranty of any kind, whether express or implied.\n" - "+AD4- +- +ACo-/\n" - "+AD4- +-\n" - "+AD4- +-+ACM-include +ADw-linux/platform+AF8-device.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/module.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/clk-provider.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/err.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/device.h+AD4-\n" + "> +\t\tcompatible = \"snps,i2s-pll-clock\";\n" + "> +\t\treg = <0x100a0 0x10>;\n" + "> +\t\t#clock-cells = <0>;\n" + "> +\t};\n" + "> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile\n" + "> index 46869d6..2ca62dc6 100644\n" + "> --- a/drivers/clk/Makefile\n" + "> +++ b/drivers/clk/Makefile\n" + "> @@ -84,3 +84,4 @@ obj-$(CONFIG_X86)\t\t\t+= x86/\n" + "> ?obj-$(CONFIG_ARCH_ZX)\t\t\t+= zte/\n" + "> ?obj-$(CONFIG_ARCH_ZYNQ)\t\t\t+= zynq/\n" + "> ?obj-$(CONFIG_H8300)\t\t+= h8300/\n" + "> +obj-$(CONFIG_ARC_PLAT_AXS10X)\t\t+= axs10x/\n" + "> diff --git a/drivers/clk/axs10x/Makefile b/drivers/clk/axs10x/Makefile\n" + "> new file mode 100644\n" + "> index 0000000..01996b8\n" + "> --- /dev/null\n" + "> +++ b/drivers/clk/axs10x/Makefile\n" + "> @@ -0,0 +1 @@\n" + "> +obj-y += i2s_pll_clock.o\n" + "> diff --git a/drivers/clk/axs10x/i2s_pll_clock.c b/drivers/clk/axs10x/i2s_pll_clock.c\n" + "> new file mode 100644\n" + "> index 0000000..3ba4e2f\n" + "> --- /dev/null\n" + "> +++ b/drivers/clk/axs10x/i2s_pll_clock.c\n" + "> @@ -0,0 +1,217 @@\n" + "> +/*\n" + "> + * Synopsys AXS10X SDP I2S PLL clock driver\n" + "> + *\n" + "> + * Copyright (C) 2016 Synopsys\n" + "> + *\n" + "> + * This file is licensed under the terms of the GNU General Public\n" + "> + * License version 2. This program is licensed \"as is\" without any\n" + "> + * warranty of any kind, whether express or implied.\n" + "> + */\n" + "> +\n" + "> +#include <linux/platform_device.h>\n" + "> +#include <linux/module.h>\n" + "> +#include <linux/clk-provider.h>\n" + "> +#include <linux/err.h>\n" + "> +#include <linux/device.h>\n" "\n" - "+ACI-linux/platform+AF8-device.h+ACI- includes +ACI-linux/device.h+ACI- so =\n" - "you may make this list of headers\n" + "\"linux/platform_device.h\" includes \"linux/device.h\" so you may make this list of headers\n" "a little bit shorter.\n" "\n" - "+AD4- +-+ACM-include +ADw-linux/of+AF8-address.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/slab.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/of.h+AD4-\n" + "> +#include <linux/of_address.h>\n" + "> +#include <linux/slab.h>\n" + "> +#include <linux/of.h>\n" "\n" - "+ACI-linux/of+AF8-address.h+ACI- already includes +ACI-linux/of.h+ACI-.\n" + "\"linux/of_address.h\" already includes \"linux/of.h\".\n" "\n" - "+AFs-snip+AF0-\n" + "[snip]\n" "\n" - "+AD4- +-\n" - "+AD4- +-static const struct of+AF8-device+AF8-id i2s+AF8-pll+AF8-clk+AF8-id=\n" - "+AFsAXQ- +AD0- +AHs-\n" - "+AD4- +-\t+AHs- .compatible +AD0- +ACI-snps,i2s-pll-clock+ACI-, +AH0-,\n" + "> +\n" + "> +static const struct of_device_id i2s_pll_clk_id[] = {\n" + "> +\t{ .compatible = \"snps,i2s-pll-clock\", },\n" "\n" "I would think that it makes sense to add the board name in\n" - "this compatible string. So something like+AKAAIg-snps,axs10x-i2s-pll-clock+=\n" - "ACI-\n" + "this compatible string. So something like?\"snps,axs10x-i2s-pll-clock\"\n" "IMHO looks much more informative.\n" "\n" "Also adding Rob Herring and DT mailing list in Cc.\n" "Please make sure Rod acks your bindings and corresponding docs.\n" "\n" - -Alexey= + -Alexey -c74b8327c37a7386643d8c9693e08f6016893015e2d61903b6b818de219eadd3 +6f8274ae0195f68ea2ea92121d0e3dcd43b59ce1ce6dd68b890da92b06e2d2d0
diff --git a/a/1.txt b/N2/1.txt index 2baf756..48f4518 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,134 +1,125 @@ Hi Jose, -On Mon, 2016-04-11 at 11:41 +-0100, Jose Abreu wrote: -+AD4- The ARC SDP I2S clock can be programmed using a -+AD4- specific PLL. -+AD4-=20 -+AD4- This patch has the goal of adding a clock driver -+AD4- that programs this PLL. -+AD4-=20 -+AD4- At this moment the rate values are hardcoded in -+AD4- a table but in the future it would be ideal to -+AD4- use a function which determines the PLL values -+AD4- given the desired rate. -+AD4-=20 -+AD4- Signed-off-by: Jose Abreu +ADw-joabreu+AEA-synopsys.com+AD4- -+AD4- --- -+AD4-=20 -+AD4- Changes v3 -+AD4- v4: -+AD4- +ACo- Added binding document (as suggested by Stephen Boyd) -+AD4- +ACo- Minor code style fixes (as suggested by Stephen Boyd) -+AD4- +ACo- Use ioremap (as suggested by Stephen Boyd) -+AD4- +ACo- Implement round+AF8-rate (as suggested by Stephen Boyd) -+AD4- +ACo- Change to platform driver (as suggested by Stephen Boyd) -+AD4- +ACo- Use +AHs-readl/writel+AH0AXw-relaxed (as suggested by Vineet Gu= -pta) -+AD4-=20 -+AD4- Changes v2 -+AD4- v3: -+AD4- +ACo- Implemented recalc+AF8-rate -+AD4-=20 -+AD4- Changes v1 -+AD4- v2: -+AD4- +ACo- Renamed folder to axs10x (as suggested by Alexey Brodkin) -+AD4- +ACo- Added more supported rates +On Mon, 2016-04-11 at 11:41 +0100, Jose Abreu wrote: +> The ARC SDP I2S clock can be programmed using a +> specific PLL. +> +> This patch has the goal of adding a clock driver +> that programs this PLL. +> +> At this moment the rate values are hardcoded in +> a table but in the future it would be ideal to +> use a function which determines the PLL values +> given the desired rate. +> +> Signed-off-by: Jose Abreu <joabreu@synopsys.com> +> --- +> +> Changes v3 -> v4: +> * Added binding document (as suggested by Stephen Boyd) +> * Minor code style fixes (as suggested by Stephen Boyd) +> * Use ioremap (as suggested by Stephen Boyd) +> * Implement round_rate (as suggested by Stephen Boyd) +> * Change to platform driver (as suggested by Stephen Boyd) +> * Use {readl/writel}_relaxed (as suggested by Vineet Gupta) +> +> Changes v2 -> v3: +> * Implemented recalc_rate +> +> Changes v1 -> v2: +> * Renamed folder to axs10x (as suggested by Alexey Brodkin) +> * Added more supported rates -+AFs-snip+AF0- +[snip] -+AD4- diff --git a/Documentation/devicetree/bindings/clock/i2s-pll-clock.tx= -t b/Documentation/devicetree/bindings/clock/i2s- -+AD4- pll-clock.txt -+AD4- new file mode 100644 -+AD4- index 0000000..ff86a41 -+AD4- --- /dev/null -+AD4- +-+-+- b/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt -+AD4- +AEAAQA- -0,0 +-1,17 +AEAAQA- -+AD4- +-Binding for the AXS10X I2S PLL clock -+AD4- +- -+AD4- +-This binding uses the common clock binding+AFs-1+AF0-. -+AD4- +- -+AD4- +-+AFs-1+AF0- Documentation/devicetree/bindings/clock/clock-bindings.= -txt -+AD4- +- -+AD4- +-Required properties: -+AD4- +-- compatible: shall be +ACI-snps,i2s-pll-clock+ACI- -+AD4- +-- +ACM-clock-cells: from common clock binding+ADs- Should always be= - set to 0. -+AD4- +-- reg : Address and length of the I2S PLL register set. -+AD4- +- -+AD4- +-Example: -+AD4- +- clock+AEA-0x100a0 +AHs- +> diff --git a/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt b/Documentation/devicetree/bindings/clock/i2s- +> pll-clock.txt +> new file mode 100644 +> index 0000000..ff86a41 +> --- /dev/null +> +++ b/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt +> @@ -0,0 +1,17 @@ +> +Binding for the AXS10X I2S PLL clock +> + +> +This binding uses the common clock binding[1]. +> + +> +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt +> + +> +Required properties: +> +- compatible: shall be "snps,i2s-pll-clock" +> +- #clock-cells: from common clock binding; Should always be set to 0. +> +- reg : Address and length of the I2S PLL register set. +> + +> +Example: +> + clock@0x100a0 { -Please remove +ACI-0x+ACI- from node name. +Please remove "0x" from node name. -+AD4- +- compatible +AD0- +ACI-snps,i2s-pll-clock+ACIAOw- -+AD4- +- reg +AD0- +ADw-0x100a0 0x10+AD4AOw- -+AD4- +- +ACM-clock-cells +AD0- +ADw-0+AD4AOw- -+AD4- +- +AH0AOw- -+AD4- diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile -+AD4- index 46869d6..2ca62dc6 100644 -+AD4- --- a/drivers/clk/Makefile -+AD4- +-+-+- b/drivers/clk/Makefile -+AD4- +AEAAQA- -84,3 +-84,4 +AEAAQA- obj-+ACQ-(CONFIG+AF8-X86) +-+AD0- x8= -6/ -+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-ARCH+AF8-ZX) +-+AD0- zte/ -+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-ARCH+AF8-ZYNQ) +-+AD0- zynq/ -+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-H8300) +-+AD0- h8300/ -+AD4- +-obj-+ACQ-(CONFIG+AF8-ARC+AF8-PLAT+AF8-AXS10X) +-+AD0- axs10x/ -+AD4- diff --git a/drivers/clk/axs10x/Makefile b/drivers/clk/axs10x/Makefil= -e -+AD4- new file mode 100644 -+AD4- index 0000000..01996b8 -+AD4- --- /dev/null -+AD4- +-+-+- b/drivers/clk/axs10x/Makefile -+AD4- +AEAAQA- -0,0 +-1 +AEAAQA- -+AD4- +-obj-y +-+AD0- i2s+AF8-pll+AF8-clock.o -+AD4- diff --git a/drivers/clk/axs10x/i2s+AF8-pll+AF8-clock.c b/drivers/clk= -/axs10x/i2s+AF8-pll+AF8-clock.c -+AD4- new file mode 100644 -+AD4- index 0000000..3ba4e2f -+AD4- --- /dev/null -+AD4- +-+-+- b/drivers/clk/axs10x/i2s+AF8-pll+AF8-clock.c -+AD4- +AEAAQA- -0,0 +-1,217 +AEAAQA- -+AD4- +-/+ACo- -+AD4- +- +ACo- Synopsys AXS10X SDP I2S PLL clock driver -+AD4- +- +ACo- -+AD4- +- +ACo- Copyright (C) 2016 Synopsys -+AD4- +- +ACo- -+AD4- +- +ACo- This file is licensed under the terms of the GNU General Pub= -lic -+AD4- +- +ACo- License version 2. This program is licensed +ACI-as is+ACI- = -without any -+AD4- +- +ACo- warranty of any kind, whether express or implied. -+AD4- +- +ACo-/ -+AD4- +- -+AD4- +-+ACM-include +ADw-linux/platform+AF8-device.h+AD4- -+AD4- +-+ACM-include +ADw-linux/module.h+AD4- -+AD4- +-+ACM-include +ADw-linux/clk-provider.h+AD4- -+AD4- +-+ACM-include +ADw-linux/err.h+AD4- -+AD4- +-+ACM-include +ADw-linux/device.h+AD4- +> + compatible = "snps,i2s-pll-clock"; +> + reg = <0x100a0 0x10>; +> + #clock-cells = <0>; +> + }; +> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile +> index 46869d6..2ca62dc6 100644 +> --- a/drivers/clk/Makefile +> +++ b/drivers/clk/Makefile +> @@ -84,3 +84,4 @@ obj-$(CONFIG_X86) += x86/ +> obj-$(CONFIG_ARCH_ZX) += zte/ +> obj-$(CONFIG_ARCH_ZYNQ) += zynq/ +> obj-$(CONFIG_H8300) += h8300/ +> +obj-$(CONFIG_ARC_PLAT_AXS10X) += axs10x/ +> diff --git a/drivers/clk/axs10x/Makefile b/drivers/clk/axs10x/Makefile +> new file mode 100644 +> index 0000000..01996b8 +> --- /dev/null +> +++ b/drivers/clk/axs10x/Makefile +> @@ -0,0 +1 @@ +> +obj-y += i2s_pll_clock.o +> diff --git a/drivers/clk/axs10x/i2s_pll_clock.c b/drivers/clk/axs10x/i2s_pll_clock.c +> new file mode 100644 +> index 0000000..3ba4e2f +> --- /dev/null +> +++ b/drivers/clk/axs10x/i2s_pll_clock.c +> @@ -0,0 +1,217 @@ +> +/* +> + * Synopsys AXS10X SDP I2S PLL clock driver +> + * +> + * Copyright (C) 2016 Synopsys +> + * +> + * This file is licensed under the terms of the GNU General Public +> + * License version 2. This program is licensed "as is" without any +> + * warranty of any kind, whether express or implied. +> + */ +> + +> +#include <linux/platform_device.h> +> +#include <linux/module.h> +> +#include <linux/clk-provider.h> +> +#include <linux/err.h> +> +#include <linux/device.h> -+ACI-linux/platform+AF8-device.h+ACI- includes +ACI-linux/device.h+ACI- so = -you may make this list of headers +"linux/platform_device.h" includes "linux/device.h" so you may make this list of headers a little bit shorter. -+AD4- +-+ACM-include +ADw-linux/of+AF8-address.h+AD4- -+AD4- +-+ACM-include +ADw-linux/slab.h+AD4- -+AD4- +-+ACM-include +ADw-linux/of.h+AD4- +> +#include <linux/of_address.h> +> +#include <linux/slab.h> +> +#include <linux/of.h> -+ACI-linux/of+AF8-address.h+ACI- already includes +ACI-linux/of.h+ACI-. +"linux/of_address.h" already includes "linux/of.h". -+AFs-snip+AF0- +[snip] -+AD4- +- -+AD4- +-static const struct of+AF8-device+AF8-id i2s+AF8-pll+AF8-clk+AF8-id= -+AFsAXQ- +AD0- +AHs- -+AD4- +- +AHs- .compatible +AD0- +ACI-snps,i2s-pll-clock+ACI-, +AH0-, +> + +> +static const struct of_device_id i2s_pll_clk_id[] = { +> + { .compatible = "snps,i2s-pll-clock", }, I would think that it makes sense to add the board name in -this compatible string. So something like+AKAAIg-snps,axs10x-i2s-pll-clock+= -ACI- +this compatible string. So something like "snps,axs10x-i2s-pll-clock" IMHO looks much more informative. Also adding Rob Herring and DT mailing list in Cc. Please make sure Rod acks your bindings and corresponding docs. --Alexey= +-Alexey-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N2/content_digest index c18c468..9db546c 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,152 +1,144 @@ "ref\050c75be8ecab225a1dd49628a173d211a02755b2.1459791946.git.joabreu@synopsys.com\0" - "From\0Alexey Brodkin <Alexey.Brodkin@synopsys.com>\0" + "ref\050c75be8ecab225a1dd49628a173d211a02755b2.1459791946.git.joabreu-HKixBCOQz3hWk0Htik3J/w@public.gmane.org\0" + "From\0Alexey Brodkin <Alexey.Brodkin-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>\0" "Subject\0Re: [RESEND PATCH v4] clk/axs10x: Add I2S PLL clock driver\0" "Date\0Mon, 11 Apr 2016 16:47:51 +0000\0" - "To\0Jose Abreu <Jose.Abreu@synopsys.com>\0" - "Cc\0linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>" - robh+dt@kernel.org <robh+dt@kernel.org> - mturquette@baylibre.com <mturquette@baylibre.com> - Carlos Palminha <CARLOS.PALMINHA@synopsys.com> - devicetree@vger.kernel.org <devicetree@vger.kernel.org> - linux-snps-arc@lists.infradead.org <linux-snps-arc@lists.infradead.org> - Vineet Gupta <Vineet.Gupta1@synopsys.com> - linux-clk@vger.kernel.org <linux-clk@vger.kernel.org> - " sboyd@codeaurora.org <sboyd@codeaurora.org>\0" + "To\0Jose Abreu <Jose.Abreu-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>\0" + "Cc\0linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>" + robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org <mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> + Carlos Palminha <CARLOS.PALMINHA-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> + Vineet Gupta <Vineet.Gupta1-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> + linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + " sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>\0" "\00:1\0" "b\0" "Hi Jose,\n" "\n" - "On Mon, 2016-04-11 at 11:41 +-0100, Jose Abreu wrote:\n" - "+AD4- The ARC SDP I2S clock can be programmed using a\n" - "+AD4- specific PLL.\n" - "+AD4-=20\n" - "+AD4- This patch has the goal of adding a clock driver\n" - "+AD4- that programs this PLL.\n" - "+AD4-=20\n" - "+AD4- At this moment the rate values are hardcoded in\n" - "+AD4- a table but in the future it would be ideal to\n" - "+AD4- use a function which determines the PLL values\n" - "+AD4- given the desired rate.\n" - "+AD4-=20\n" - "+AD4- Signed-off-by: Jose Abreu +ADw-joabreu+AEA-synopsys.com+AD4-\n" - "+AD4- ---\n" - "+AD4-=20\n" - "+AD4- Changes v3 -+AD4- v4:\n" - "+AD4- +ACo- Added binding document (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Minor code style fixes (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Use ioremap (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Implement round+AF8-rate (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Change to platform driver (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Use +AHs-readl/writel+AH0AXw-relaxed (as suggested by Vineet Gu=\n" - "pta)\n" - "+AD4-=20\n" - "+AD4- Changes v2 -+AD4- v3:\n" - "+AD4- +ACo- Implemented recalc+AF8-rate\n" - "+AD4-=20\n" - "+AD4- Changes v1 -+AD4- v2:\n" - "+AD4- +ACo- Renamed folder to axs10x (as suggested by Alexey Brodkin)\n" - "+AD4- +ACo- Added more supported rates\n" + "On Mon, 2016-04-11 at 11:41 +0100, Jose Abreu wrote:\n" + "> The ARC SDP I2S clock can be programmed using a\n" + "> specific PLL.\n" + "> \n" + "> This patch has the goal of adding a clock driver\n" + "> that programs this PLL.\n" + "> \n" + "> At this moment the rate values are hardcoded in\n" + "> a table but in the future it would be ideal to\n" + "> use a function which determines the PLL values\n" + "> given the desired rate.\n" + "> \n" + "> Signed-off-by: Jose Abreu <joabreu@synopsys.com>\n" + "> ---\n" + "> \n" + "> Changes v3 -> v4:\n" + "> * Added binding document (as suggested by Stephen Boyd)\n" + "> * Minor code style fixes (as suggested by Stephen Boyd)\n" + "> * Use ioremap (as suggested by Stephen Boyd)\n" + "> * Implement round_rate (as suggested by Stephen Boyd)\n" + "> * Change to platform driver (as suggested by Stephen Boyd)\n" + "> * Use {readl/writel}_relaxed (as suggested by Vineet Gupta)\n" + "> \n" + "> Changes v2 -> v3:\n" + "> * Implemented recalc_rate\n" + "> \n" + "> Changes v1 -> v2:\n" + "> * Renamed folder to axs10x (as suggested by Alexey Brodkin)\n" + "> * Added more supported rates\n" "\n" - "+AFs-snip+AF0-\n" + "[snip]\n" "\n" - "+AD4- diff --git a/Documentation/devicetree/bindings/clock/i2s-pll-clock.tx=\n" - "t b/Documentation/devicetree/bindings/clock/i2s-\n" - "+AD4- pll-clock.txt\n" - "+AD4- new file mode 100644\n" - "+AD4- index 0000000..ff86a41\n" - "+AD4- --- /dev/null\n" - "+AD4- +-+-+- b/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt\n" - "+AD4- +AEAAQA- -0,0 +-1,17 +AEAAQA-\n" - "+AD4- +-Binding for the AXS10X I2S PLL clock\n" - "+AD4- +-\n" - "+AD4- +-This binding uses the common clock binding+AFs-1+AF0-.\n" - "+AD4- +-\n" - "+AD4- +-+AFs-1+AF0- Documentation/devicetree/bindings/clock/clock-bindings.=\n" - "txt\n" - "+AD4- +-\n" - "+AD4- +-Required properties:\n" - "+AD4- +-- compatible: shall be +ACI-snps,i2s-pll-clock+ACI-\n" - "+AD4- +-- +ACM-clock-cells: from common clock binding+ADs- Should always be=\n" - " set to 0.\n" - "+AD4- +-- reg : Address and length of the I2S PLL register set.\n" - "+AD4- +-\n" - "+AD4- +-Example:\n" - "+AD4- +-\tclock+AEA-0x100a0 +AHs-\n" + "> diff --git a/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt b/Documentation/devicetree/bindings/clock/i2s-\n" + "> pll-clock.txt\n" + "> new file mode 100644\n" + "> index 0000000..ff86a41\n" + "> --- /dev/null\n" + "> +++ b/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt\n" + "> @@ -0,0 +1,17 @@\n" + "> +Binding for the AXS10X I2S PLL clock\n" + "> +\n" + "> +This binding uses the common clock binding[1].\n" + "> +\n" + "> +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt\n" + "> +\n" + "> +Required properties:\n" + "> +- compatible: shall be \"snps,i2s-pll-clock\"\n" + "> +- #clock-cells: from common clock binding; Should always be set to 0.\n" + "> +- reg : Address and length of the I2S PLL register set.\n" + "> +\n" + "> +Example:\n" + "> +\tclock@0x100a0 {\n" "\n" - "Please remove +ACI-0x+ACI- from node name.\n" + "Please remove \"0x\" from node name.\n" "\n" - "+AD4- +-\t\tcompatible +AD0- +ACI-snps,i2s-pll-clock+ACIAOw-\n" - "+AD4- +-\t\treg +AD0- +ADw-0x100a0 0x10+AD4AOw-\n" - "+AD4- +-\t\t+ACM-clock-cells +AD0- +ADw-0+AD4AOw-\n" - "+AD4- +-\t+AH0AOw-\n" - "+AD4- diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile\n" - "+AD4- index 46869d6..2ca62dc6 100644\n" - "+AD4- --- a/drivers/clk/Makefile\n" - "+AD4- +-+-+- b/drivers/clk/Makefile\n" - "+AD4- +AEAAQA- -84,3 +-84,4 +AEAAQA- obj-+ACQ-(CONFIG+AF8-X86)\t\t\t+-+AD0- x8=\n" - "6/\n" - "+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-ARCH+AF8-ZX)\t\t\t+-+AD0- zte/\n" - "+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-ARCH+AF8-ZYNQ)\t\t\t+-+AD0- zynq/\n" - "+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-H8300)\t\t+-+AD0- h8300/\n" - "+AD4- +-obj-+ACQ-(CONFIG+AF8-ARC+AF8-PLAT+AF8-AXS10X)\t\t+-+AD0- axs10x/\n" - "+AD4- diff --git a/drivers/clk/axs10x/Makefile b/drivers/clk/axs10x/Makefil=\n" - "e\n" - "+AD4- new file mode 100644\n" - "+AD4- index 0000000..01996b8\n" - "+AD4- --- /dev/null\n" - "+AD4- +-+-+- b/drivers/clk/axs10x/Makefile\n" - "+AD4- +AEAAQA- -0,0 +-1 +AEAAQA-\n" - "+AD4- +-obj-y +-+AD0- i2s+AF8-pll+AF8-clock.o\n" - "+AD4- diff --git a/drivers/clk/axs10x/i2s+AF8-pll+AF8-clock.c b/drivers/clk=\n" - "/axs10x/i2s+AF8-pll+AF8-clock.c\n" - "+AD4- new file mode 100644\n" - "+AD4- index 0000000..3ba4e2f\n" - "+AD4- --- /dev/null\n" - "+AD4- +-+-+- b/drivers/clk/axs10x/i2s+AF8-pll+AF8-clock.c\n" - "+AD4- +AEAAQA- -0,0 +-1,217 +AEAAQA-\n" - "+AD4- +-/+ACo-\n" - "+AD4- +- +ACo- Synopsys AXS10X SDP I2S PLL clock driver\n" - "+AD4- +- +ACo-\n" - "+AD4- +- +ACo- Copyright (C) 2016 Synopsys\n" - "+AD4- +- +ACo-\n" - "+AD4- +- +ACo- This file is licensed under the terms of the GNU General Pub=\n" - "lic\n" - "+AD4- +- +ACo- License version 2. This program is licensed +ACI-as is+ACI- =\n" - "without any\n" - "+AD4- +- +ACo- warranty of any kind, whether express or implied.\n" - "+AD4- +- +ACo-/\n" - "+AD4- +-\n" - "+AD4- +-+ACM-include +ADw-linux/platform+AF8-device.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/module.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/clk-provider.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/err.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/device.h+AD4-\n" + "> +\t\tcompatible = \"snps,i2s-pll-clock\";\n" + "> +\t\treg = <0x100a0 0x10>;\n" + "> +\t\t#clock-cells = <0>;\n" + "> +\t};\n" + "> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile\n" + "> index 46869d6..2ca62dc6 100644\n" + "> --- a/drivers/clk/Makefile\n" + "> +++ b/drivers/clk/Makefile\n" + "> @@ -84,3 +84,4 @@ obj-$(CONFIG_X86)\t\t\t+= x86/\n" + "> \302\240obj-$(CONFIG_ARCH_ZX)\t\t\t+= zte/\n" + "> \302\240obj-$(CONFIG_ARCH_ZYNQ)\t\t\t+= zynq/\n" + "> \302\240obj-$(CONFIG_H8300)\t\t+= h8300/\n" + "> +obj-$(CONFIG_ARC_PLAT_AXS10X)\t\t+= axs10x/\n" + "> diff --git a/drivers/clk/axs10x/Makefile b/drivers/clk/axs10x/Makefile\n" + "> new file mode 100644\n" + "> index 0000000..01996b8\n" + "> --- /dev/null\n" + "> +++ b/drivers/clk/axs10x/Makefile\n" + "> @@ -0,0 +1 @@\n" + "> +obj-y += i2s_pll_clock.o\n" + "> diff --git a/drivers/clk/axs10x/i2s_pll_clock.c b/drivers/clk/axs10x/i2s_pll_clock.c\n" + "> new file mode 100644\n" + "> index 0000000..3ba4e2f\n" + "> --- /dev/null\n" + "> +++ b/drivers/clk/axs10x/i2s_pll_clock.c\n" + "> @@ -0,0 +1,217 @@\n" + "> +/*\n" + "> + * Synopsys AXS10X SDP I2S PLL clock driver\n" + "> + *\n" + "> + * Copyright (C) 2016 Synopsys\n" + "> + *\n" + "> + * This file is licensed under the terms of the GNU General Public\n" + "> + * License version 2. This program is licensed \"as is\" without any\n" + "> + * warranty of any kind, whether express or implied.\n" + "> + */\n" + "> +\n" + "> +#include <linux/platform_device.h>\n" + "> +#include <linux/module.h>\n" + "> +#include <linux/clk-provider.h>\n" + "> +#include <linux/err.h>\n" + "> +#include <linux/device.h>\n" "\n" - "+ACI-linux/platform+AF8-device.h+ACI- includes +ACI-linux/device.h+ACI- so =\n" - "you may make this list of headers\n" + "\"linux/platform_device.h\" includes \"linux/device.h\" so you may make this list of headers\n" "a little bit shorter.\n" "\n" - "+AD4- +-+ACM-include +ADw-linux/of+AF8-address.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/slab.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/of.h+AD4-\n" + "> +#include <linux/of_address.h>\n" + "> +#include <linux/slab.h>\n" + "> +#include <linux/of.h>\n" "\n" - "+ACI-linux/of+AF8-address.h+ACI- already includes +ACI-linux/of.h+ACI-.\n" + "\"linux/of_address.h\" already includes \"linux/of.h\".\n" "\n" - "+AFs-snip+AF0-\n" + "[snip]\n" "\n" - "+AD4- +-\n" - "+AD4- +-static const struct of+AF8-device+AF8-id i2s+AF8-pll+AF8-clk+AF8-id=\n" - "+AFsAXQ- +AD0- +AHs-\n" - "+AD4- +-\t+AHs- .compatible +AD0- +ACI-snps,i2s-pll-clock+ACI-, +AH0-,\n" + "> +\n" + "> +static const struct of_device_id i2s_pll_clk_id[] = {\n" + "> +\t{ .compatible = \"snps,i2s-pll-clock\", },\n" "\n" "I would think that it makes sense to add the board name in\n" - "this compatible string. So something like+AKAAIg-snps,axs10x-i2s-pll-clock+=\n" - "ACI-\n" + "this compatible string. So something like\302\240\"snps,axs10x-i2s-pll-clock\"\n" "IMHO looks much more informative.\n" "\n" "Also adding Rob Herring and DT mailing list in Cc.\n" "Please make sure Rod acks your bindings and corresponding docs.\n" "\n" - -Alexey= + "-Alexey--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -c74b8327c37a7386643d8c9693e08f6016893015e2d61903b6b818de219eadd3 +88bf5b5c4527126718ad5baf10732099d31139fe9131bea35bfbeeeb74a51615
diff --git a/a/1.txt b/N3/1.txt index 2baf756..4f10285 100644 --- a/a/1.txt +++ b/N3/1.txt @@ -1,134 +1,122 @@ Hi Jose, -On Mon, 2016-04-11 at 11:41 +-0100, Jose Abreu wrote: -+AD4- The ARC SDP I2S clock can be programmed using a -+AD4- specific PLL. -+AD4-=20 -+AD4- This patch has the goal of adding a clock driver -+AD4- that programs this PLL. -+AD4-=20 -+AD4- At this moment the rate values are hardcoded in -+AD4- a table but in the future it would be ideal to -+AD4- use a function which determines the PLL values -+AD4- given the desired rate. -+AD4-=20 -+AD4- Signed-off-by: Jose Abreu +ADw-joabreu+AEA-synopsys.com+AD4- -+AD4- --- -+AD4-=20 -+AD4- Changes v3 -+AD4- v4: -+AD4- +ACo- Added binding document (as suggested by Stephen Boyd) -+AD4- +ACo- Minor code style fixes (as suggested by Stephen Boyd) -+AD4- +ACo- Use ioremap (as suggested by Stephen Boyd) -+AD4- +ACo- Implement round+AF8-rate (as suggested by Stephen Boyd) -+AD4- +ACo- Change to platform driver (as suggested by Stephen Boyd) -+AD4- +ACo- Use +AHs-readl/writel+AH0AXw-relaxed (as suggested by Vineet Gu= -pta) -+AD4-=20 -+AD4- Changes v2 -+AD4- v3: -+AD4- +ACo- Implemented recalc+AF8-rate -+AD4-=20 -+AD4- Changes v1 -+AD4- v2: -+AD4- +ACo- Renamed folder to axs10x (as suggested by Alexey Brodkin) -+AD4- +ACo- Added more supported rates +On Mon, 2016-04-11 at 11:41 +0100, Jose Abreu wrote: +> The ARC SDP I2S clock can be programmed using a +> specific PLL. +> +> This patch has the goal of adding a clock driver +> that programs this PLL. +> +> At this moment the rate values are hardcoded in +> a table but in the future it would be ideal to +> use a function which determines the PLL values +> given the desired rate. +> +> Signed-off-by: Jose Abreu <joabreu@synopsys.com> +> --- +> +> Changes v3 -> v4: +> * Added binding document (as suggested by Stephen Boyd) +> * Minor code style fixes (as suggested by Stephen Boyd) +> * Use ioremap (as suggested by Stephen Boyd) +> * Implement round_rate (as suggested by Stephen Boyd) +> * Change to platform driver (as suggested by Stephen Boyd) +> * Use {readl/writel}_relaxed (as suggested by Vineet Gupta) +> +> Changes v2 -> v3: +> * Implemented recalc_rate +> +> Changes v1 -> v2: +> * Renamed folder to axs10x (as suggested by Alexey Brodkin) +> * Added more supported rates -+AFs-snip+AF0- +[snip] -+AD4- diff --git a/Documentation/devicetree/bindings/clock/i2s-pll-clock.tx= -t b/Documentation/devicetree/bindings/clock/i2s- -+AD4- pll-clock.txt -+AD4- new file mode 100644 -+AD4- index 0000000..ff86a41 -+AD4- --- /dev/null -+AD4- +-+-+- b/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt -+AD4- +AEAAQA- -0,0 +-1,17 +AEAAQA- -+AD4- +-Binding for the AXS10X I2S PLL clock -+AD4- +- -+AD4- +-This binding uses the common clock binding+AFs-1+AF0-. -+AD4- +- -+AD4- +-+AFs-1+AF0- Documentation/devicetree/bindings/clock/clock-bindings.= -txt -+AD4- +- -+AD4- +-Required properties: -+AD4- +-- compatible: shall be +ACI-snps,i2s-pll-clock+ACI- -+AD4- +-- +ACM-clock-cells: from common clock binding+ADs- Should always be= - set to 0. -+AD4- +-- reg : Address and length of the I2S PLL register set. -+AD4- +- -+AD4- +-Example: -+AD4- +- clock+AEA-0x100a0 +AHs- +> diff --git a/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt b/Documentation/devicetree/bindings/clock/i2s- +> pll-clock.txt +> new file mode 100644 +> index 0000000..ff86a41 +> --- /dev/null +> +++ b/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt +> @@ -0,0 +1,17 @@ +> +Binding for the AXS10X I2S PLL clock +> + +> +This binding uses the common clock binding[1]. +> + +> +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt +> + +> +Required properties: +> +- compatible: shall be "snps,i2s-pll-clock" +> +- #clock-cells: from common clock binding; Should always be set to 0. +> +- reg : Address and length of the I2S PLL register set. +> + +> +Example: +> + clock@0x100a0 { -Please remove +ACI-0x+ACI- from node name. +Please remove "0x" from node name. -+AD4- +- compatible +AD0- +ACI-snps,i2s-pll-clock+ACIAOw- -+AD4- +- reg +AD0- +ADw-0x100a0 0x10+AD4AOw- -+AD4- +- +ACM-clock-cells +AD0- +ADw-0+AD4AOw- -+AD4- +- +AH0AOw- -+AD4- diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile -+AD4- index 46869d6..2ca62dc6 100644 -+AD4- --- a/drivers/clk/Makefile -+AD4- +-+-+- b/drivers/clk/Makefile -+AD4- +AEAAQA- -84,3 +-84,4 +AEAAQA- obj-+ACQ-(CONFIG+AF8-X86) +-+AD0- x8= -6/ -+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-ARCH+AF8-ZX) +-+AD0- zte/ -+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-ARCH+AF8-ZYNQ) +-+AD0- zynq/ -+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-H8300) +-+AD0- h8300/ -+AD4- +-obj-+ACQ-(CONFIG+AF8-ARC+AF8-PLAT+AF8-AXS10X) +-+AD0- axs10x/ -+AD4- diff --git a/drivers/clk/axs10x/Makefile b/drivers/clk/axs10x/Makefil= -e -+AD4- new file mode 100644 -+AD4- index 0000000..01996b8 -+AD4- --- /dev/null -+AD4- +-+-+- b/drivers/clk/axs10x/Makefile -+AD4- +AEAAQA- -0,0 +-1 +AEAAQA- -+AD4- +-obj-y +-+AD0- i2s+AF8-pll+AF8-clock.o -+AD4- diff --git a/drivers/clk/axs10x/i2s+AF8-pll+AF8-clock.c b/drivers/clk= -/axs10x/i2s+AF8-pll+AF8-clock.c -+AD4- new file mode 100644 -+AD4- index 0000000..3ba4e2f -+AD4- --- /dev/null -+AD4- +-+-+- b/drivers/clk/axs10x/i2s+AF8-pll+AF8-clock.c -+AD4- +AEAAQA- -0,0 +-1,217 +AEAAQA- -+AD4- +-/+ACo- -+AD4- +- +ACo- Synopsys AXS10X SDP I2S PLL clock driver -+AD4- +- +ACo- -+AD4- +- +ACo- Copyright (C) 2016 Synopsys -+AD4- +- +ACo- -+AD4- +- +ACo- This file is licensed under the terms of the GNU General Pub= -lic -+AD4- +- +ACo- License version 2. This program is licensed +ACI-as is+ACI- = -without any -+AD4- +- +ACo- warranty of any kind, whether express or implied. -+AD4- +- +ACo-/ -+AD4- +- -+AD4- +-+ACM-include +ADw-linux/platform+AF8-device.h+AD4- -+AD4- +-+ACM-include +ADw-linux/module.h+AD4- -+AD4- +-+ACM-include +ADw-linux/clk-provider.h+AD4- -+AD4- +-+ACM-include +ADw-linux/err.h+AD4- -+AD4- +-+ACM-include +ADw-linux/device.h+AD4- +> + compatible = "snps,i2s-pll-clock"; +> + reg = <0x100a0 0x10>; +> + #clock-cells = <0>; +> + }; +> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile +> index 46869d6..2ca62dc6 100644 +> --- a/drivers/clk/Makefile +> +++ b/drivers/clk/Makefile +> @@ -84,3 +84,4 @@ obj-$(CONFIG_X86) += x86/ +> obj-$(CONFIG_ARCH_ZX) += zte/ +> obj-$(CONFIG_ARCH_ZYNQ) += zynq/ +> obj-$(CONFIG_H8300) += h8300/ +> +obj-$(CONFIG_ARC_PLAT_AXS10X) += axs10x/ +> diff --git a/drivers/clk/axs10x/Makefile b/drivers/clk/axs10x/Makefile +> new file mode 100644 +> index 0000000..01996b8 +> --- /dev/null +> +++ b/drivers/clk/axs10x/Makefile +> @@ -0,0 +1 @@ +> +obj-y += i2s_pll_clock.o +> diff --git a/drivers/clk/axs10x/i2s_pll_clock.c b/drivers/clk/axs10x/i2s_pll_clock.c +> new file mode 100644 +> index 0000000..3ba4e2f +> --- /dev/null +> +++ b/drivers/clk/axs10x/i2s_pll_clock.c +> @@ -0,0 +1,217 @@ +> +/* +> + * Synopsys AXS10X SDP I2S PLL clock driver +> + * +> + * Copyright (C) 2016 Synopsys +> + * +> + * This file is licensed under the terms of the GNU General Public +> + * License version 2. This program is licensed "as is" without any +> + * warranty of any kind, whether express or implied. +> + */ +> + +> +#include <linux/platform_device.h> +> +#include <linux/module.h> +> +#include <linux/clk-provider.h> +> +#include <linux/err.h> +> +#include <linux/device.h> -+ACI-linux/platform+AF8-device.h+ACI- includes +ACI-linux/device.h+ACI- so = -you may make this list of headers +"linux/platform_device.h" includes "linux/device.h" so you may make this list of headers a little bit shorter. -+AD4- +-+ACM-include +ADw-linux/of+AF8-address.h+AD4- -+AD4- +-+ACM-include +ADw-linux/slab.h+AD4- -+AD4- +-+ACM-include +ADw-linux/of.h+AD4- +> +#include <linux/of_address.h> +> +#include <linux/slab.h> +> +#include <linux/of.h> -+ACI-linux/of+AF8-address.h+ACI- already includes +ACI-linux/of.h+ACI-. +"linux/of_address.h" already includes "linux/of.h". -+AFs-snip+AF0- +[snip] -+AD4- +- -+AD4- +-static const struct of+AF8-device+AF8-id i2s+AF8-pll+AF8-clk+AF8-id= -+AFsAXQ- +AD0- +AHs- -+AD4- +- +AHs- .compatible +AD0- +ACI-snps,i2s-pll-clock+ACI-, +AH0-, +> + +> +static const struct of_device_id i2s_pll_clk_id[] = { +> + { .compatible = "snps,i2s-pll-clock", }, I would think that it makes sense to add the board name in -this compatible string. So something like+AKAAIg-snps,axs10x-i2s-pll-clock+= -ACI- +this compatible string. So something like "snps,axs10x-i2s-pll-clock" IMHO looks much more informative. Also adding Rob Herring and DT mailing list in Cc. Please make sure Rod acks your bindings and corresponding docs. --Alexey= +-Alexey diff --git a/a/content_digest b/N3/content_digest index c18c468..4778e6c 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -16,137 +16,125 @@ "b\0" "Hi Jose,\n" "\n" - "On Mon, 2016-04-11 at 11:41 +-0100, Jose Abreu wrote:\n" - "+AD4- The ARC SDP I2S clock can be programmed using a\n" - "+AD4- specific PLL.\n" - "+AD4-=20\n" - "+AD4- This patch has the goal of adding a clock driver\n" - "+AD4- that programs this PLL.\n" - "+AD4-=20\n" - "+AD4- At this moment the rate values are hardcoded in\n" - "+AD4- a table but in the future it would be ideal to\n" - "+AD4- use a function which determines the PLL values\n" - "+AD4- given the desired rate.\n" - "+AD4-=20\n" - "+AD4- Signed-off-by: Jose Abreu +ADw-joabreu+AEA-synopsys.com+AD4-\n" - "+AD4- ---\n" - "+AD4-=20\n" - "+AD4- Changes v3 -+AD4- v4:\n" - "+AD4- +ACo- Added binding document (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Minor code style fixes (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Use ioremap (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Implement round+AF8-rate (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Change to platform driver (as suggested by Stephen Boyd)\n" - "+AD4- +ACo- Use +AHs-readl/writel+AH0AXw-relaxed (as suggested by Vineet Gu=\n" - "pta)\n" - "+AD4-=20\n" - "+AD4- Changes v2 -+AD4- v3:\n" - "+AD4- +ACo- Implemented recalc+AF8-rate\n" - "+AD4-=20\n" - "+AD4- Changes v1 -+AD4- v2:\n" - "+AD4- +ACo- Renamed folder to axs10x (as suggested by Alexey Brodkin)\n" - "+AD4- +ACo- Added more supported rates\n" + "On Mon, 2016-04-11 at 11:41 +0100, Jose Abreu wrote:\n" + "> The ARC SDP I2S clock can be programmed using a\n" + "> specific PLL.\n" + "> \n" + "> This patch has the goal of adding a clock driver\n" + "> that programs this PLL.\n" + "> \n" + "> At this moment the rate values are hardcoded in\n" + "> a table but in the future it would be ideal to\n" + "> use a function which determines the PLL values\n" + "> given the desired rate.\n" + "> \n" + "> Signed-off-by: Jose Abreu <joabreu@synopsys.com>\n" + "> ---\n" + "> \n" + "> Changes v3 -> v4:\n" + "> * Added binding document (as suggested by Stephen Boyd)\n" + "> * Minor code style fixes (as suggested by Stephen Boyd)\n" + "> * Use ioremap (as suggested by Stephen Boyd)\n" + "> * Implement round_rate (as suggested by Stephen Boyd)\n" + "> * Change to platform driver (as suggested by Stephen Boyd)\n" + "> * Use {readl/writel}_relaxed (as suggested by Vineet Gupta)\n" + "> \n" + "> Changes v2 -> v3:\n" + "> * Implemented recalc_rate\n" + "> \n" + "> Changes v1 -> v2:\n" + "> * Renamed folder to axs10x (as suggested by Alexey Brodkin)\n" + "> * Added more supported rates\n" "\n" - "+AFs-snip+AF0-\n" + "[snip]\n" "\n" - "+AD4- diff --git a/Documentation/devicetree/bindings/clock/i2s-pll-clock.tx=\n" - "t b/Documentation/devicetree/bindings/clock/i2s-\n" - "+AD4- pll-clock.txt\n" - "+AD4- new file mode 100644\n" - "+AD4- index 0000000..ff86a41\n" - "+AD4- --- /dev/null\n" - "+AD4- +-+-+- b/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt\n" - "+AD4- +AEAAQA- -0,0 +-1,17 +AEAAQA-\n" - "+AD4- +-Binding for the AXS10X I2S PLL clock\n" - "+AD4- +-\n" - "+AD4- +-This binding uses the common clock binding+AFs-1+AF0-.\n" - "+AD4- +-\n" - "+AD4- +-+AFs-1+AF0- Documentation/devicetree/bindings/clock/clock-bindings.=\n" - "txt\n" - "+AD4- +-\n" - "+AD4- +-Required properties:\n" - "+AD4- +-- compatible: shall be +ACI-snps,i2s-pll-clock+ACI-\n" - "+AD4- +-- +ACM-clock-cells: from common clock binding+ADs- Should always be=\n" - " set to 0.\n" - "+AD4- +-- reg : Address and length of the I2S PLL register set.\n" - "+AD4- +-\n" - "+AD4- +-Example:\n" - "+AD4- +-\tclock+AEA-0x100a0 +AHs-\n" + "> diff --git a/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt b/Documentation/devicetree/bindings/clock/i2s-\n" + "> pll-clock.txt\n" + "> new file mode 100644\n" + "> index 0000000..ff86a41\n" + "> --- /dev/null\n" + "> +++ b/Documentation/devicetree/bindings/clock/i2s-pll-clock.txt\n" + "> @@ -0,0 +1,17 @@\n" + "> +Binding for the AXS10X I2S PLL clock\n" + "> +\n" + "> +This binding uses the common clock binding[1].\n" + "> +\n" + "> +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt\n" + "> +\n" + "> +Required properties:\n" + "> +- compatible: shall be \"snps,i2s-pll-clock\"\n" + "> +- #clock-cells: from common clock binding; Should always be set to 0.\n" + "> +- reg : Address and length of the I2S PLL register set.\n" + "> +\n" + "> +Example:\n" + "> +\tclock@0x100a0 {\n" "\n" - "Please remove +ACI-0x+ACI- from node name.\n" + "Please remove \"0x\" from node name.\n" "\n" - "+AD4- +-\t\tcompatible +AD0- +ACI-snps,i2s-pll-clock+ACIAOw-\n" - "+AD4- +-\t\treg +AD0- +ADw-0x100a0 0x10+AD4AOw-\n" - "+AD4- +-\t\t+ACM-clock-cells +AD0- +ADw-0+AD4AOw-\n" - "+AD4- +-\t+AH0AOw-\n" - "+AD4- diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile\n" - "+AD4- index 46869d6..2ca62dc6 100644\n" - "+AD4- --- a/drivers/clk/Makefile\n" - "+AD4- +-+-+- b/drivers/clk/Makefile\n" - "+AD4- +AEAAQA- -84,3 +-84,4 +AEAAQA- obj-+ACQ-(CONFIG+AF8-X86)\t\t\t+-+AD0- x8=\n" - "6/\n" - "+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-ARCH+AF8-ZX)\t\t\t+-+AD0- zte/\n" - "+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-ARCH+AF8-ZYNQ)\t\t\t+-+AD0- zynq/\n" - "+AD4- +AKA-obj-+ACQ-(CONFIG+AF8-H8300)\t\t+-+AD0- h8300/\n" - "+AD4- +-obj-+ACQ-(CONFIG+AF8-ARC+AF8-PLAT+AF8-AXS10X)\t\t+-+AD0- axs10x/\n" - "+AD4- diff --git a/drivers/clk/axs10x/Makefile b/drivers/clk/axs10x/Makefil=\n" - "e\n" - "+AD4- new file mode 100644\n" - "+AD4- index 0000000..01996b8\n" - "+AD4- --- /dev/null\n" - "+AD4- +-+-+- b/drivers/clk/axs10x/Makefile\n" - "+AD4- +AEAAQA- -0,0 +-1 +AEAAQA-\n" - "+AD4- +-obj-y +-+AD0- i2s+AF8-pll+AF8-clock.o\n" - "+AD4- diff --git a/drivers/clk/axs10x/i2s+AF8-pll+AF8-clock.c b/drivers/clk=\n" - "/axs10x/i2s+AF8-pll+AF8-clock.c\n" - "+AD4- new file mode 100644\n" - "+AD4- index 0000000..3ba4e2f\n" - "+AD4- --- /dev/null\n" - "+AD4- +-+-+- b/drivers/clk/axs10x/i2s+AF8-pll+AF8-clock.c\n" - "+AD4- +AEAAQA- -0,0 +-1,217 +AEAAQA-\n" - "+AD4- +-/+ACo-\n" - "+AD4- +- +ACo- Synopsys AXS10X SDP I2S PLL clock driver\n" - "+AD4- +- +ACo-\n" - "+AD4- +- +ACo- Copyright (C) 2016 Synopsys\n" - "+AD4- +- +ACo-\n" - "+AD4- +- +ACo- This file is licensed under the terms of the GNU General Pub=\n" - "lic\n" - "+AD4- +- +ACo- License version 2. This program is licensed +ACI-as is+ACI- =\n" - "without any\n" - "+AD4- +- +ACo- warranty of any kind, whether express or implied.\n" - "+AD4- +- +ACo-/\n" - "+AD4- +-\n" - "+AD4- +-+ACM-include +ADw-linux/platform+AF8-device.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/module.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/clk-provider.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/err.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/device.h+AD4-\n" + "> +\t\tcompatible = \"snps,i2s-pll-clock\";\n" + "> +\t\treg = <0x100a0 0x10>;\n" + "> +\t\t#clock-cells = <0>;\n" + "> +\t};\n" + "> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile\n" + "> index 46869d6..2ca62dc6 100644\n" + "> --- a/drivers/clk/Makefile\n" + "> +++ b/drivers/clk/Makefile\n" + "> @@ -84,3 +84,4 @@ obj-$(CONFIG_X86)\t\t\t+= x86/\n" + "> \302\240obj-$(CONFIG_ARCH_ZX)\t\t\t+= zte/\n" + "> \302\240obj-$(CONFIG_ARCH_ZYNQ)\t\t\t+= zynq/\n" + "> \302\240obj-$(CONFIG_H8300)\t\t+= h8300/\n" + "> +obj-$(CONFIG_ARC_PLAT_AXS10X)\t\t+= axs10x/\n" + "> diff --git a/drivers/clk/axs10x/Makefile b/drivers/clk/axs10x/Makefile\n" + "> new file mode 100644\n" + "> index 0000000..01996b8\n" + "> --- /dev/null\n" + "> +++ b/drivers/clk/axs10x/Makefile\n" + "> @@ -0,0 +1 @@\n" + "> +obj-y += i2s_pll_clock.o\n" + "> diff --git a/drivers/clk/axs10x/i2s_pll_clock.c b/drivers/clk/axs10x/i2s_pll_clock.c\n" + "> new file mode 100644\n" + "> index 0000000..3ba4e2f\n" + "> --- /dev/null\n" + "> +++ b/drivers/clk/axs10x/i2s_pll_clock.c\n" + "> @@ -0,0 +1,217 @@\n" + "> +/*\n" + "> + * Synopsys AXS10X SDP I2S PLL clock driver\n" + "> + *\n" + "> + * Copyright (C) 2016 Synopsys\n" + "> + *\n" + "> + * This file is licensed under the terms of the GNU General Public\n" + "> + * License version 2. This program is licensed \"as is\" without any\n" + "> + * warranty of any kind, whether express or implied.\n" + "> + */\n" + "> +\n" + "> +#include <linux/platform_device.h>\n" + "> +#include <linux/module.h>\n" + "> +#include <linux/clk-provider.h>\n" + "> +#include <linux/err.h>\n" + "> +#include <linux/device.h>\n" "\n" - "+ACI-linux/platform+AF8-device.h+ACI- includes +ACI-linux/device.h+ACI- so =\n" - "you may make this list of headers\n" + "\"linux/platform_device.h\" includes \"linux/device.h\" so you may make this list of headers\n" "a little bit shorter.\n" "\n" - "+AD4- +-+ACM-include +ADw-linux/of+AF8-address.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/slab.h+AD4-\n" - "+AD4- +-+ACM-include +ADw-linux/of.h+AD4-\n" + "> +#include <linux/of_address.h>\n" + "> +#include <linux/slab.h>\n" + "> +#include <linux/of.h>\n" "\n" - "+ACI-linux/of+AF8-address.h+ACI- already includes +ACI-linux/of.h+ACI-.\n" + "\"linux/of_address.h\" already includes \"linux/of.h\".\n" "\n" - "+AFs-snip+AF0-\n" + "[snip]\n" "\n" - "+AD4- +-\n" - "+AD4- +-static const struct of+AF8-device+AF8-id i2s+AF8-pll+AF8-clk+AF8-id=\n" - "+AFsAXQ- +AD0- +AHs-\n" - "+AD4- +-\t+AHs- .compatible +AD0- +ACI-snps,i2s-pll-clock+ACI-, +AH0-,\n" + "> +\n" + "> +static const struct of_device_id i2s_pll_clk_id[] = {\n" + "> +\t{ .compatible = \"snps,i2s-pll-clock\", },\n" "\n" "I would think that it makes sense to add the board name in\n" - "this compatible string. So something like+AKAAIg-snps,axs10x-i2s-pll-clock+=\n" - "ACI-\n" + "this compatible string. So something like\302\240\"snps,axs10x-i2s-pll-clock\"\n" "IMHO looks much more informative.\n" "\n" "Also adding Rob Herring and DT mailing list in Cc.\n" "Please make sure Rod acks your bindings and corresponding docs.\n" "\n" - -Alexey= + -Alexey -c74b8327c37a7386643d8c9693e08f6016893015e2d61903b6b818de219eadd3 +2ff43dcad10004c191798aa2d507c6a9a57bd1ae8ab474def1e482b9486d4b11
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