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From: <gregkh@linuxfoundation.org>
To: alexander.deucher@amd.com, Harish.Kasiviswanathan@amd.com,
	gregkh@linuxfoundation.org
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "drm/amdgpu/gmc: use proper register for vram type on Fiji" has been added to the 4.5-stable tree
Date: Wed, 13 Apr 2016 14:46:46 -0700	[thread overview]
Message-ID: <1460584006116101@kroah.com> (raw)


This is a note to let you know that I've just added the patch titled

    drm/amdgpu/gmc: use proper register for vram type on Fiji

to the 4.5-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-amdgpu-gmc-use-proper-register-for-vram-type-on-fiji.patch
and it can be found in the queue-4.5 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From b634de4f446c062a0c95ec4d150b4cf7c85e3526 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@amd.com>
Date: Thu, 31 Mar 2016 16:41:32 -0400
Subject: drm/amdgpu/gmc: use proper register for vram type on Fiji

From: Alex Deucher <alexander.deucher@amd.com>

commit b634de4f446c062a0c95ec4d150b4cf7c85e3526 upstream.

The offset changed on Fiji.

Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c |    9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -866,6 +866,8 @@ static int gmc_v8_0_late_init(void *hand
 	return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
 }
 
+#define mmMC_SEQ_MISC0_FIJI 0xA71
+
 static int gmc_v8_0_sw_init(void *handle)
 {
 	int r;
@@ -879,7 +881,12 @@ static int gmc_v8_0_sw_init(void *handle
 	if (adev->flags & AMD_IS_APU) {
 		adev->mc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
 	} else {
-		u32 tmp = RREG32(mmMC_SEQ_MISC0);
+		u32 tmp;
+
+		if (adev->asic_type == CHIP_FIJI)
+			tmp = RREG32(mmMC_SEQ_MISC0_FIJI);
+		else
+			tmp = RREG32(mmMC_SEQ_MISC0);
 		tmp &= MC_SEQ_MISC0__MT__MASK;
 		adev->mc.vram_type = gmc_v8_0_convert_vram_type(tmp);
 	}


Patches currently in stable-queue which might be from alexander.deucher@amd.com are

queue-4.5/drm-radeon-add-a-dpm-quirk-for-all-r7-370-parts.patch
queue-4.5/drm-radeon-add-a-dpm-quirk-for-sapphire-dual-x-r7-370-2g-d5.patch
queue-4.5/drm-radeon-add-another-r7-370-quirk.patch
queue-4.5/drm-amd-powerplay-fix-segment-fault-issue-in-multi-display-case.patch
queue-4.5/drm-amdgpu-gmc-use-proper-register-for-vram-type-on-fiji.patch
queue-4.5/drm-amdgpu-gmc-move-vram-type-fetching-into-sw_init.patch

                 reply	other threads:[~2016-04-13 21:46 UTC|newest]

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